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Tsuneo Nakata

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

10

Venues

7

Active years

1994–2021

Best venue rank

A

Where they publish

Papers

10 indexed papers, newest first.

YearVenueTitleAuthors
2021PIMRCData Traffic Offloading and Rate Control for Vehicles Using Radio Environment, Network Load and Route Planning.Takeo Ohseki, Kosuke Yamazaki, Daiki Maemoto, Shigeki Kawai, Tsuneo Nakata, Akira Itou
2014VTCPrecise Location by Fingerprinting Road Segments with Variation of Wireless Reception.Tsuneo Nakata, Shigeki Kawai
2005DATEIntegrating UML into SoC Design Process.Qiang Zhu, Ryosuke Oishi, Takashi Hasegawa, Tsuneo Nakata
2002VLSIDFunctional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract).Subir K. Roy, S. Ramesh, Supratik Chakraborty, Tsuneo Nakata, Sreeranga P. Rajan
2000ASPDACFormal verification based on assume and guarantee approach - a case study (short paper).Subir K. Roy, Hiroaki Iwashita, Tsuneo Nakata
2000VLSIDDataflow Analysis for Resource Contention and Register Leakage Properties.Subir K. Roy, Hiroaki Iwashita, Tsuneo Nakata
1998ICCDAn approach to verify a large scale system-on-a-chip using symbolic model checking.Koichiro Takayama, Taizo Satoh, Tsuneo Nakata, Fumiyasu Hirose
1997ICCADForward model checking techniques oriented to buggy designs.Hiroaki Iwashita, Tsuneo Nakata
1996ICCADCTL model checking based on forward state traversal.Hiroaki Iwashita, Tsuneo Nakata, Fumiyasu Hirose
1994ICCADAutomatic test program generation for pipelined processors.Hiroaki Iwashita, Satoshi Kowatari, Tsuneo Nakata, Fumiyasu Hirose