| 2023 | GLOBECOM | Communication-Efficient Federated Learning for UAV Networks with Knowledge Distillation and Transfer Learning. | Yalong Li, Celimuge Wu, Zhaoyang Du, Lei Zhong, Tsutomu Yoshinaga |
| 2020 | ICNP | Context-Aware Clustering for SDN Enabled Network. | Ran Duo, Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji |
| 2019 | DASC | Traffic Flow Prediction with Compact Neural Networks. | Yuhang Li, Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji |
| 2018 | COMPSAC | System Resource Management to Control the Risk of Data-Loss in a Cloud-Based Disaster Recovery. | Yuichi Taguchi, Tsutomu Yoshinaga |
| 2018 | UIC | SDN-Based Handover Approach in IEEE 802.11p and LTE Hybrid Vehicular Networks. | Ran Duo, Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji |
| 2018 | UIC | A Prophet-Based DTN Protocol for VANETs. | Zhaoyang Du, Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji |
| 2017 | GLOBECOM | Cooperative Content Delivery in Vehicular Networks with Integration of Sub-6 GHz and mmWave. | Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji |
| 2017 | VTC | V2R Communication Protocol Based on Game Theory Inspired Clustering. | Celimuge Wu, Tsutomu Yoshinaga, Yusheng Ji |
| 2016 | PIMRC | Context-aware unified routing for VANETs based on virtual clustering. | Yusheng Ji, Celimuge Wu, Tsutomu Yoshinaga |
| 2013 | SSDBM | A fast handshake join implementation on FPGA with adaptive merging network. | Yasin Oge, Takefumi Miyoshi, Hideyuki Kawashima, Tsutomu Yoshinaga |
| 2012 | ASPLOS | FLAT: a GPU programming framework to provide embedded MPI. | Takefumi Miyoshi, Hidetsugu Irie, Keigo Shima, Hiroki Honda, Masaaki Kondo, Tsutomu Yoshinaga |
| 2011 | FPL | A Coarse Grain Reconfigurable Processor Architecture for Stream Processing Engine. | Takefumi Miyoshi, Hideyuki Kawashima, Yuta Terada, Tsutomu Yoshinaga |
| 2009 | HPCA | Prediction router: Yet another low latency on-chip router architecture. | Hiroki Matsutani, Michihiro Koibuchi, Hideharu Amano, Tsutomu Yoshinaga |
| 2005 | EUC | Modular Design Structure and High-Level Prototyping for Novel Embedded Processor Core. | Ben A. Abderazek, Sotaro Kawata, Tsutomu Yoshinaga, Masahiro Sowa |
| 2003 | ISPA | On the Design of a Register Queue Based Processor Architecture (FaRM-rq). | Ben A. Abderazek, Soichi Shigeta, Tsutomu Yoshinaga, Masahiro Sowa |
| 2002 | FCCM | A Scalable FPGA-Based Custom Computing Machine for a Medical Image Processing. | Takashi Yokota, Masamichi Nagafuchi, Yoshito Mekada, Tsutomu Yoshinaga, Kanemitsu Ootsu, Takanobu Baba |
| 2002 | FPL | Real-Time Medical Diagnosis on a Multiple FPGA-based System. | Takashi Yokota, Masamichi Nagafuchi, Yoshito Mekada, Tsutomu Yoshinaga, Kanemitsu Ootsu, Takanobu Baba |
| 2000 | ICPADS | Recover-X: An Adaptive Router with Limited Escape Channels. | Tsutomu Yoshinaga, Masaya Hayashi, Maki Horita, Sayuri Nakamura, Kanemitsu Ootsu, Takanobu Baba |
| 1998 | ICPADS | A Cost and Performance Comparison for Wormhole Routers based on HDL Designs. | Tsutomu Yoshinaga, Masaya Hayashi, Maki Horita, Y. Yamaguchi, Kanemitsu Ootsu, Takanobu Baba |
| 1991 | COMPSAC | A parallel object-oriented language A-NETL and its programming environment. | Tsutomu Yoshinaga, Takanobu Baba |
| 1990 | SC | A network-topology independent task allocation strategy for parallel computers. | Takanobu Baba, Yoshifumi Iwamoto, Tsutomu Yoshinaga |
| 1990 | SC | A parallel object-oriented total architecture: A-NET. | Takanobu Baba, Tsutomu Yoshinaga, Tohru Iijima, Yoshifumi Iwamoto, Masahiro Hamada, Mitsuru Suzuki |