Skip to content

Ulrich Khne

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

23

Venues

15

Active years

2005–2025

Best venue rank

A*

Where they publish

Papers

23 indexed papers, newest first.

YearVenueTitleAuthors
2025DSDExecution Platform Contracts.Dorian Bourgeoisat, Ulrich Khne, Florian Brandner
2021ACNSTelepathic Headache: Mitigating Cache Side-Channel Attacks on Convolutional Neural Networks.Herv Chabanne, Jean-Luc Danger, Linda Guiga, Ulrich Khne
2021PRDCMoving Target Defense Strategy in Critical Embedded Systems: A Game-theoretic Approach.Maxime Ayrault, Etienne Borde, Ulrich Khne, Jean Leneutre
2019CCSRun or Hide? Both! A Method Based on IPv6 Address Switching to Escape While Being Hidden.Maxime Ayrault, Etienne Borde, Ulrich Khne
2019DSDLAOCON: A Run-Time Monitoring and Verification Approach for Hardware Trojan Detection.Jean-Luc Danger, Laurent Fribourg, Ulrich Khne, Maha Naceur
2018DSDCCFI-Cache: A Transparent and Flexible Hardware Protection for Code and Control-Flow Integrity.Jean-Luc Danger, Adrien Facon, Sylvain Guilley, Karine Heydemann, Ulrich Khne, Abdelmalek Si-Merabet, Michal Timbert
2016DATEFormal verification of integer multipliers by combining Grbner basis with logic reduction.Amr A. R. Sayed-Ahmed, Daniel Groe, Ulrich Khne, Mathias Soeken, Rolf Drechsler
2015DACA generic representation of CCSL time constraints for UML/MARTE models.Judith Peters, Robert Wille, Nils Przigoda, Ulrich Khne, Rolf Drechsler
2015RSPEnsuring safety and reliability of IP-based system design - A container approach.Arun Chandrasekharan, Kenneth Schmitz, Ulrich Khne, Rolf Drechsler
2014ETSVerification of the decimal floating-point square root operation.Amr A. R. Sayed-Ahmed, Hossam A. H. Fahmy, Ulrich Khne
2014FDLVerifying consistency between activity diagrams and their corresponding OCL contracts.Christoph Hilken, Julia Seiter, Robert Wille, Ulrich Khne, Rolf Drechsler
2014FDLAutomatic refinement checking for formal system models.Julia Seiter, Robert Wille, Ulrich Khne, Rolf Drechsler
2014TAPBehaviour Driven Development for Tests and Verification.Melanie Diepenbeck, Ulrich Khne, Mathias Soeken, Rolf Drechsler
2012FMIMITATOR 2.5: A Tool for Analyzing Robustness in Scheduling Problems.tienne Andr, Laurent Fribourg, Ulrich Khne, Romain Soulat
2011DDECSAutomatic property generation for the formal verification of bus bridges.Mathias Soeken, Ulrich Khne, Martin Freibothe, Grschwin Fey, Rolf Drechsler
2011ISORCTowards Dependability-Aware Design of Hardware Systems Using Extended Program State Machines.Kim Grttner, Andreas Herrholz, Ulrich Khne, Daniel Groe, Achim Rettberg, Wolfgang Nebel, Rolf Drechsler
2010FMCADAutomated formal verification of processors based on architectural models.Ulrich Khne, Sven Beyer, Jrg Bormann, John Barstow
2009DATEProperty analysis and design understanding.Ulrich Khne, Daniel Groe, Rolf Drechsler
2009DATEIncreasing the accuracy of SAT-based debugging.Andr Slflow, Grschwin Fey, Ccile Braunstein, Ulrich Khne, Rolf Drechsler
2009RSPGenerating an Efficient Instruction Set Simulator from a Complete Property Suite.Ulrich Khne, Sven Beyer, Christian Pichler
2009RSPWoLFram- A Word Level Framework for Formal Verification.Andr Slflow, Ulrich Khne, Grschwin Fey, Daniel Groe, Rolf Drechsler
2007DATEEstimating functional coverage in bounded model checking.Daniel Groe, Ulrich Khne, Rolf Drechsler
2005GIFormale Verifikation des Befehlssatzes eines SystemC Mikroprozessors.Daniel Groe, Ulrich Khne, Rolf Drechsler