Ulya R. Karpuzcu
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
24
Venues
11
Active years
2005–2026
Best venue rank
A*
Where they publish
Papers
24 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2026 | FCCM | A Hybrid Ising FPGA-COBI Architecture with Hardware-Based Problem Decomposition. | Ruihong Yin, Yue Zheng, Chaohui Li, Ahmet Efe, Abhimanyu Kumar, Ziqing Zeng, Ulya R. Karpuzcu, Sachin S. Sapatnekar, Chris H. Kim |
| 2026 | ISCA | SATIC: An Optimizing Ising Compiler for SAT(isfiability). | Ahmet Efe, Hsrev Cilasun, Abhimanyu Kumar, Nafisa Sadaf Prova, Ziqing Zeng, Tahmida Islam, Ruihong Yin, Chaohui Li, Peter Kreye, Chris H. Kim, Sachin S. Sapatnekar, Ulya R. Karpuzcu |
| 2024 | DATE | On Gate Flip Errors in Computing-In-Memory. | Zamshed I. Chowdhury, Hsrev Cilasun, Salonik Resch, Masoud Zabihi, Yang Lv, Brandon Zink, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu |
| 2024 | ISCA | On Error Correction for Nonvolatile Processing-In-Memory. | Hsrev Cilasun, Salonik Resch, Zamshed I. Chowdhury, Masoud Zabihi, Yang Lv, Brandon Zink, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu |
| 2023 | ISCA | On Endurance of Processing in (Nonvolatile) Memory. | Salonik Resch, M. Hsrev Cilasun, Zamshed I. Chowdhury, Masoud Zabihi, Zhengyang Zhao, Jian-Ping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu |
| 2020 | DAC | CRAFFT: High Resolution FFT Accelerator In Spintronic Computational RAM. | M. Hsrev Cilasun, Salonik Resch, Zamshed Iqbal Chowdhury, Erin Olson, Masoud Zabihi, Zhengyang Zhao, Thomas Peterson, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu |
| 2020 | HPCA | ACR: Amnesic Checkpointing and Recovery. | Ismail Akturk, Ulya R. Karpuzcu |
| 2020 | MICRO | MOUSE: Inference In Non-volatile Memory for Energy Harvesting Applications. | Salonik Resch, S. Karen Khatamifard, Zamshed I. Chowdhury, Masoud Zabihi, Zhengyang Zhao, M. Hsrev Cilasun, Jianping Wang, Sachin S. Sapatnekar, Ulya R. Karpuzcu |
| 2019 | HPCA | POWERT Channels: A Novel Class of Covert CommunicationExploiting Power Management Vulnerabilities. | S. Karen Khatamifard, Longfei Wang, Amitabh Das, Seluk Kse, Ulya R. Karpuzcu |
| 2019 | VTS | Special Session: Does Approximation Make Testing Harder (or Easier)? | R. Iris Bahar, Ulya R. Karpuzcu, Sasa Misailovic |
| 2018 | DATE | Mitigation of NBTI induced performance degradation in on-chip digital LDOs. | Longfei Wang, S. Karen Khatamifard, Ulya R. Karpuzcu, Seluk Kse |
| 2017 | ASPLOS | AMNESIAC: Amnesic Automatic Computer. | Ismail Akturk, Ulya R. Karpuzcu |
| 2017 | ISCA | ThermoGater: Thermally-Aware On-Chip Voltage Regulation. | S. Karen Khatamifard, Longfei Wang, Weize Yu, Seluk Kse, Ulya R. Karpuzcu |
| 2016 | ICCD | VARIUS-TC: A modular architecture-level model of parametric variation for thin-channel switches. | S. Karen Khatamifard, Michael Resch, Nam Sung Kim, Ulya R. Karpuzcu |
| 2016 | MICRO | Snatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks. | Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert C. N. Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas |
| 2015 | ICCD | Comparison of single-ISA heterogeneous versus wide dynamic range processors for mobile applications. | Hamid Reza Ghasemi, Ulya R. Karpuzcu, Nam Sung Kim |
| 2014 | HPCA | Accordion: Toward soft Near-Threshold Voltage Computing. | Ulya R. Karpuzcu, Ismail Akturk, Nam Sung Kim |
| 2013 | HPCA | EnergySmart: Toward energy-efficient manycores for Near-Threshold Computing. | Ulya R. Karpuzcu, Abhishek A. Sinkar, Nam Sung Kim, Josep Torrellas |
| 2012 | DSN | VARIUS-NTV: A microarchitectural model to capture the increased sensitivity of manycores to process variations at near-threshold voltages. | Ulya R. Karpuzcu, Krishna B. Kolluru, Nam Sung Kim, Josep Torrellas |
| 2010 | HPCA | LeadOut: Composing low-overhead frequency-enhancing techniques for single-thread performance in configurable multicores. | Brian Greskamp, Ulya R. Karpuzcu, Josep Torrellas |
| 2009 | HPCA | Blueshift: Designing processors for timing speculation from the ground up. | Brian Greskamp, Lu Wan, Ulya R. Karpuzcu, Jeffrey J. Cook, Josep Torrellas, Deming Chen, Craig B. Zilles |
| 2009 | HPCA | Accurate microarchitecture-level fault modeling for studying hardware faults. | Man-Lap Li, Pradeep Ramachandran, Ulya R. Karpuzcu, Siva Kumar Sastry Hari, Sarita V. Adve |
| 2009 | MICRO | The BubbleWrap many-core: popping cores for sequential acceleration. | Ulya R. Karpuzcu, Brian Greskamp, Josep Torrellas |
| 2005 | GECCO | Automatic verilog code generation through grammatical evolution. | Ulya R. Karpuzcu |