| 2024 | VLSID | Heterogeneous CMOS-MEMS based Boost Converter for 2.4 GHz RF energy Harvester. | Sumit Saha, Prasad B. Kanyaka, Mark Lust, Nima Ghalichechian, V. Ramgopal Rao, Maryam Shojaei Baghini |
| 2016 | VLSID | A Fully-Integrated Radio-Frequency Power Amplifier in 28nm CMOS Technology Mounted in BGA Package. | Ankur Gupta, Mayank Shrivastava, Maryam Shojaei Baghini, Harald Gossner, V. Ramgopal Rao |
| 2012 | VLSID | Circuit Optimization at 22nm Technology Node. | Angada B. Sachid, Pallavi Paliwal, S. Joshi, Maryam Shojaei Baghini, Dinesh Sharma, V. Ramgopal Rao |
| 2009 | ASPDAC | Automated design and optimization of circuits in emerging technologies. | Rajesh Amratlal Thakker, Chaitanya Sathe, Angada B. Sachid, Maryam Shojaei Baghini, V. Ramgopal Rao, Mahesh B. Patil |
| 2006 | VLSID | Embedded Tutorial: Analog Circuit Performance Issues with Aggressively Scaled Gate Oxide CMOS Technologies. | K. Narasimhulu, V. Ramgopal Rao |
| 2005 | VLSID | Physics and Technology: Towards Low-Power DSM Design. | D. Mukhopadhyay, P. K. Basu, V. Ramgopal Rao |
| 2004 | VLSID | The Influence of Process Variations on the Halo MOSFETs and its Implications on the Analog Circuit performance. | K. Narasimhulu, Siva G. Narendra, V. Ramgopal Rao |
| 2003 | VLSID | A Novel Dynamic Threshold Operation Using Electrically Induced Junction MOSFET in the Deep Sub-micrometer CMOS Regime. | Abhisek Dixit, V. Ramgopal Rao |
| 2003 | VLSID | Small Signal Characteristics of Thin Film Single Halo SOI MOSFET for Mixed Mode Applications. | Najeeb-ud-Din Hakim, V. Ramgopal Rao, J. Vasi |
| 2003 | VLSID | Application of Look-up Table Approach to High-K Gate Dielectric MOS Transistor circuits. | D. Vinay Kumar, Nihar R. Mohapatra, Mahesh B. Patil, V. Ramgopal Rao |
| 2003 | VLSID | Detailed Analysis of FIBL in MOS Transistors with High-K Gate Dielectrics. | Nihar R. Mohapatra, Madhav P. Desai, V. Ramgopal Rao |
| 2001 | VLSID | Effect Of Fringing Capacitances In Sub 100 Nm Mosfet's With High-K Gate Dielectrics. | Nihar R. Mohapatra, Arijit Dutta, Madhav P. Desai, V. Ramgopal Rao |
| 2001 | VLSID | erformance Optimization Of 60 Nm Channel Length Vertical Mosfets Using Channel Engineering. | G. Shrivastav, S. Mahapatra, V. Ramgopal Rao, J. Vasi, K. G. Anil, C. Fink, Walter Hansch, I. Eisele |