| 2026 | DATE | FARM: Fast Acceleration of Random forests via in-Memory traversal. | Aymen Ahmed, Valeria Bertacco |
| 2025 | DATE | GLEAM: Graph-Based Learning Through Efficient Aggregation in Memory. | Andrew McCrabb, Ivris Raymond, Valeria Bertacco |
| 2025 | DATE | SPIRE: Inferring Hardware Bottlenecks from Performance Counter Data. | Nicholas Wendt, Mahesh Ketkar, Valeria Bertacco |
| 2024 | DAC | Duet: A Collaborative User Driven Recommendation System for Edge Devices. | Vidushi Goyal, Valeria Bertacco, Reetuparna Das |
| 2023 | MICRO | ACRE: Accelerating Random Forests for Explainability. | Andrew McCrabb, Aymen Ahmed, Valeria Bertacco |
| 2022 | DAC | PriMax: maximizing DSL application performance with selective primitive acceleration. | Nicholas Wendt, Todd M. Austin, Valeria Bertacco |
| 2021 | DAC | MyML: User-Driven Machine Learning. | Vidushi Goyal, Valeria Bertacco, Reetuparna Das |
| 2021 | FCCM | Compute-Capable Block RAMs for Efficient Deep Learning Acceleration on FPGAs. | Xiaowei Wang, Vidushi Goyal, Jiecao Yu, Valeria Bertacco, Andrew Boutros, Eriko Nurvitadhi, Charles Augustine, Ravi R. Iyer, Reetuparna Das |
| 2021 | ICCD | Chopin: Composing Cost-Effective Custom Chips with Algorithmic Chiplets. | Pete Ehrett, Todd M. Austin, Valeria Bertacco |
| 2021 | ISPASS | A Defense-Inspired Benchmark Suite. | Pete Ehrett, Nathan Block, Bing Schaefer, Adrian Berding, John Paul Koenig, Pranav Srinivasan, Valeria Bertacco, Todd M. Austin |
| 2020 | DAC | Centaur: Hybrid Processing in On/Off-chip Memory Architecture for Graph Analytics. | Abraham Addisie, Valeria Bertacco |
| 2020 | DAC | Seesaw: End-to-end Dynamic Sensing for IoT using Machine Learning. | Vidushi Goyal, Valeria Bertacco, Reetuparna Das |
| 2020 | DATE | GraphVine: Exploiting Multicast for Scalable Graph Analytics. | Leul Belayneh, Valeria Bertacco |
| 2019 | ASPDAC | Collaborative accelerators for in-memory MapReduce on scale-up machines. | Abraham Addisie, Valeria Bertacco |
| 2019 | ASPLOS | Morpheus: A Vulnerability-Tolerant Secure Architecture Based on Ensembles of Moving Target Defenses with Churn. | Mark Gallagher, Lauren Biernacki, Shibo Chen, Zelalem Birhanu Aweke, Salessawi Ferede Yitbarek, Misiker Tadesse Aga, Austin Harris, Zhixing Xu, Baris Kasikci, Valeria Bertacco, Sharad Malik, Mohit Tiwari, Todd M. Austin |
| 2019 | DAC | DREDGE: Dynamic Repartitioning during Dynamic Graph Execution. | Andrew McCrabb, Eric Winsor, Valeria Bertacco |
| 2019 | DATE | SiPterposer: A Fault-Tolerant Substrate for Flexible System-in-Package Design. | Pete Ehrett, Todd M. Austin, Valeria Bertacco |
| 2019 | ISLPED | MessageFusion: On-path Message Coalescing for Energy Efficient and Scalable Graph Analytics. | Leul Belayneh, Abraham Addisie, Valeria Bertacco |
| 2018 | DATE | Symbolic assertion mining for security validation. | Alessandro Danese, Valeria Bertacco, Graziano Pravadelli |
| 2018 | ICCAD | Vulnerability-tolerant secure architectures. | Todd M. Austin, Valeria Bertacco, Baris Kasikci, Sharad Malik, Mohit Tiwari |
| 2018 | ICCAD | SWAN: mitigating hardware trojans with design ambiguity. | Timothy Linscott, Pete Ehrett, Valeria Bertacco, Todd M. Austin |
| 2018 | ICCD | Low-Overhead Microarchitectural Patching for Multicore Memory Subsystems. | Doowon Lee, Opeoluwa Matthews, Valeria Bertacco |
| 2017 | ASPDAC | AGARSoC: Automated test and coverage-model generation for verification of accelerator-rich SoCs. | Biruk Mammo, Doowon Lee, Harrison Davis, Yijun Hou, Valeria Bertacco |
| 2017 | DATE | 3DFAR: A three-dimensional fabric for reliable multi-core processors. | Javad Bagherzadeh, Valeria Bertacco |
| 2017 | ISCA | MTraceCheck: Validating Non-Deterministic Behavior of Memory Consistency Models in Post-Silicon Validation. | Doowon Lee, Valeria Bertacco |
| 2017 | ISCA | Regaining Lost Cycles with HotCalls: A Fast Interface for SGX Secure Enclaves. | Ofir Weisse, Valeria Bertacco, Todd M. Austin |
| 2016 | DAC | Probabilistic bug-masking analysis for post-silicon tests in microprocessor verification. | Doowon Lee, Tom Kolan, Arkadiy Morgenshtein, Vitali Sokhin, Ronny Morad, Avi Ziv, Valeria Bertacco |
| 2016 | DATE | Correct runtime operation for NoCs through adaptive-region protection. | Rawan Abdel-Khalek, Valeria Bertacco |
| 2016 | ICCAD | BugMD: automatic mismatch diagnosis for bug triaging. | Biruk Mammo, Milind Furia, Valeria Bertacco, Scott A. Mahlke, Daya Shanker Khudia |
| 2015 | ICCD | ItHELPS: Iterative high-accuracy error localization in post-silicon. | Valeria Bertacco, Wade Bonkowski |
| 2015 | ISLPED | ReDEEM: A heterogeneous distributed microarchitecture for energy-efficient reliability. | Biruk Mammo, Ritesh Parikh, Valeria Bertacco |
| 2015 | MICRO | NoCVision: A Network-on-Chip Dynamic Visualization Solution. | Vaibhav Gogte, Doowon Lee, Ritesh Parikh, Valeria Bertacco |
| 2015 | VTS | Panel: When will the cost of dependability end innovation in computer design? | Valeria Bertacco |
| 2014 | DAC | Power-Aware NoCs through Routing and Topology Reconfiguration. | Ritesh Parikh, Reetuparna Das, Valeria Bertacco |
| 2014 | DATE | ArChiVED: Architectural checking via event digests for high performance validation. | Chang-Hong Hsu, Debapriya Chatterjee, Ronny Morad, Raviv Gal, Valeria Bertacco |
| 2014 | DATE | Brisk and limited-impact NoC routing reconfiguration. | Doowon Lee, Ritesh Parikh, Valeria Bertacco |
| 2014 | ICCAD | High-radix on-chip networks with low-radix routers. | Animesh Jain, Ritesh Parikh, Valeria Bertacco |
| 2013 | CGO | Schnauzer: scalable profiling for likely security bug sites. | William Arthur, Biruk Mammo, Ricardo Rodrguez Jorge, Todd M. Austin, Valeria Bertacco |
| 2013 | DATE | On the use of GP-GPUs for accelerating compute-intensive EDA applications. | Valeria Bertacco, Debapriya Chatterjee, Nicola Bombieri, Franco Fummi, Sara Vinco, Anirudh M. Kaushik, Hiren D. Patel |
| 2013 | DATE | Machine learning-based anomaly detection for post-silicon bug diagnosis. | Andrew DeOrio, Qingkun Li, Matthew Burgess, Valeria Bertacco |
| 2013 | ICCAD | Hybrid checking for microarchitectural validation of microprocessor designs on acceleration platforms. | Debapriya Chatterjee, Biruk Mammo, Doowon Lee, Raviv Gal, Ronny Morad, Amir Nahir, Avi Ziv, Valeria Bertacco |
| 2013 | MICRO | uDIREC: unified diagnosis and reconfiguration for frugal bypass of NoC faults. | Ritesh Parikh, Valeria Bertacco |
| 2012 | DAC | Humans for EDA and EDA for humans. | Valeria Bertacco |
| 2012 | DAC | Checking architectural outputs instruction-by-instruction on acceleration platforms. | Debapriya Chatterjee, Anatoly Koyfman, Ronny Morad, Avi Ziv, Valeria Bertacco |
| 2012 | DAC | SAGA: SystemC acceleration on GPU architectures. | Sara Vinco, Debapriya Chatterjee, Valeria Bertacco, Franco Fummi |
| 2012 | DATE | Approximating checkers for simulation acceleration. | Biruk Mammo, Debapriya Chatterjee, Dmitry Pidan, Amir Nahir, Avi Ziv, Ronny Morad, Valeria Bertacco |
| 2012 | DATE | CrashTest'ing SWAT: Accurate, gate-level evaluation of symptom-based resiliency solutions. | Andrea Pellegrini, Robert Smolinski, Lei Chen, Xin Fu, Siva Kumar Sastry Hari, Junhao Jiang, Sarita V. Adve, Todd M. Austin, Valeria Bertacco |
| 2012 | ICCAD | Functional post-silicon diagnosis and debug for networks-on-chip. | Rawan Abdel-Khalek, Valeria Bertacco |
| 2012 | ICCAD | Bridging pre- and post-silicon debugging with BiPeD. | Andrew DeOrio, Jialin Li, Valeria Bertacco |
| 2012 | ISCA | Viper: Virtual pipelines for enhanced reliability. | Andrea Pellegrini, Joseph L. Greathouse, Valeria Bertacco |
| 2012 | VTS | Comprehensive online defect diagnosis in on-chip networks. | Amirali Ghofrani, Ritesh Parikh, Saeed Shamshiri, Andrew DeOrio, Kwang-Ting Cheng, Valeria Bertacco |
| 2011 | CGO | Highly scalable distributed dataflow analysis. | Joseph L. Greathouse, Chelsea LeBlanc, Todd M. Austin, Valeria Bertacco |
| 2011 | DAC | DRAIN: distributed recovery architecture for inaccessible nodes in multi-core chips. | Andrew DeOrio, Konstantinos Aisopos, Valeria Bertacco, Li-Shiuan Peh |
| 2011 | DATE | ReliNoC: A reliable network for priority-based on-chip communication. | Mohammad Reza Kakoee, Valeria Bertacco, Luca Benini |
| 2011 | ICCAD | Simulation-based signal selection for state restoration in silicon debug. | Debapriya Chatterjee, Calvin McCarter, Valeria Bertacco |
| 2011 | ICCAD | Post-silicon bug diagnosis with inconsistent executions. | Andrew DeOrio, Daya Shanker Khudia, Valeria Bertacco |
| 2011 | ICCD | Functional correctness for CMP interconnects. | Rawan Abdel-Khalek, Ritesh Parikh, Andrew DeOrio, Valeria Bertacco |
| 2011 | MICRO | Formally enhanced runtime verification to ensure NoC functional correctness. | Ritesh Parikh, Valeria Bertacco |
| 2010 | ASPDAC | Post-silicon debugging for multi-core designs. | Valeria Bertacco |
| 2010 | DAC | Electronic design automation for social networks. | Andrew DeOrio, Valeria Bertacco |
| 2010 | DAC | Bridging pre-silicon verification and post-silicon validation. | Amir Nahir, Avi Ziv, Rajesh Galivanche, Alan J. Hu, Miron Abramovici, Albert Camilleri, Bob Bentley, Harry Foster, Valeria Bertacco, Shakti Kapoor |
| 2010 | DATE | Fault-based attack of RSA authentication. | Andrea Pellegrini, Valeria Bertacco, Todd M. Austin |
| 2010 | ICCAD | Application-Aware diagnosis of runtime hardware faults. | Andrea Pellegrini, Valeria Bertacco |
| 2010 | ICCD | EQUIPE: Parallel equivalence checking with GP-GPUs. | Debapriya Chatterjee, Valeria Bertacco |
| 2009 | DAC | Debugging strategies for mere mortals. | Valeria Bertacco |
| 2009 | DAC | Event-driven gate-level simulation with GP-GPUs. | Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco |
| 2009 | DAC | Human computing for EDA. | Andrew DeOrio, Valeria Bertacco |
| 2009 | DAC | Vicis: a reliable network for unreliable silicon. | David Fick, Andrew DeOrio, Jin Hu, Valeria Bertacco, David T. Blaauw, Dennis Sylvester |
| 2009 | DATE | Customizing IP cores for system-on-chip designs using extensive external don't-cares. | Kai-Hui Chang, Valeria Bertacco, Igor L. Markov |
| 2009 | DATE | GCS: High-performance gate-level simulation with GPGPUs. | Debapriya Chatterjee, Andrew DeOrio, Valeria Bertacco |
| 2009 | DATE | A highly resilient routing algorithm for fault-tolerant NoCs. | David Fick, Andrew DeOrio, Gregory K. Chen, Valeria Bertacco, Dennis Sylvester, David T. Blaauw |
| 2009 | DATE | Caspar: Hardware patching for multicore processors. | Ilya Wagner, Valeria Bertacco |
| 2009 | HPCA | Dacota: Post-silicon validation of the memory subsystem in multi-core designs. | Andrew DeOrio, Ilya Wagner, Valeria Bertacco |
| 2008 | DATE | Random Stimulus Generation using Entropy and XOR Constraints. | Stephen Plaza, Igor L. Markov, Valeria Bertacco |
| 2008 | DATE | MCjammer: Adaptive Verification for Multi-core Designs. | Ilya Wagner, Valeria Bertacco |
| 2008 | ICCD | Post-silicon verification for cache coherence. | Andrew DeOrio, Adam Bauserman, Valeria Bertacco |
| 2008 | ICCD | CrashTest: A fast high-fidelity FPGA-based resiliency analysis framework. | Andrea Pellegrini, Kypros Constantinides, Dan Zhang, Shobana Sudhakar, Valeria Bertacco, Todd M. Austin |
| 2008 | ICCD | Reversi: Post-silicon validation system for modern microprocessors. | Ilya Wagner, Valeria Bertacco |
| 2008 | MICRO | Testudo: Heavyweight security analysis via statistical sampling. | Joseph L. Greathouse, Ilya Wagner, David A. Ramos, Gautam Bhatnagar, Todd M. Austin, Valeria Bertacco, Seth Pettie |
| 2007 | ASPDAC | Safe Delay Optimization for Physical Synthesis. | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
| 2007 | ASPDAC | Fixing Design Errors with Counterexamples and Resynthesis. | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
| 2007 | ASPDAC | Node Mergers in the Presence of Don't Cares. | Stephen Plaza, Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
| 2007 | DATE | Low-cost protection for SER upsets and silicon defects. | Mojtaba Mehrara, Mona Attariyan, Smitha Shyam, Kypros Constantinides, Valeria Bertacco, Todd M. Austin |
| 2007 | DATE | Engineering trust with semantic guardians. | Ilya Wagner, Valeria Bertacco |
| 2007 | ICCAD | Automating post-silicon debugging and repair. | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
| 2007 | MICRO | Software-Based Online Detection of Hardware Defects Mechanisms, Architectural Support, and Evaluation. | Kypros Constantinides, Onur Mutlu, Todd M. Austin, Valeria Bertacco |
| 2006 | ASPDAC | Depth-driven verification of simultaneous interfaces. | Ilya Wagner, Valeria Bertacco, Todd M. Austin |
| 2006 | ASPLOS | Ultra low-cost defect protection for microprocessor pipelines. | Smitha Shyam, Kypros Constantinides, Sujay Phadke, Valeria Bertacco, Todd M. Austin |
| 2006 | DAC | Shielding against design flaws with field repairable control logic. | Ilya Wagner, Valeria Bertacco, Todd M. Austin |
| 2006 | DATE | Distance-guided hybrid verification with GUIDO. | Smitha Shyam, Valeria Bertacco |
| 2006 | HPCA | BulletProof: a defect-tolerant CMP switch architecture. | Kypros Constantinides, Stephen Plaza, Jason A. Blome, Bin Zhang, Valeria Bertacco, Scott A. Mahlke, Todd M. Austin, Michael Orshansky |
| 2006 | ICCAD | Verification through the principle of least astonishment. | Beth Isaksen, Valeria Bertacco |
| 2005 | ASPDAC | Opportunities and challenges for better than worst-case design. | Todd M. Austin, Valeria Bertacco, David T. Blaauw, Trevor N. Mudge |
| 2005 | ASPDAC | STACCATO: disjoint support decompositions from BDDs through symbolic kernels. | Stephen Plaza, Valeria Bertacco |
| 2005 | DAC | StressTest: an automatic approach to test generation via activity monitors. | Ilya Wagner, Valeria Bertacco, Todd M. Austin |
| 2005 | ICCAD | Simulation-based bug trace minimization with BMC-based refinement. | Kai-Hui Chang, Valeria Bertacco, Igor L. Markov |
| 2005 | ICCAD | Post-placement rewiring and rebuffering by exhaustive search for functional symmetries. | Kai-Hui Chang, Igor L. Markov, Valeria Bertacco |
| 2005 | ICCD | Deployment of Better Than Worst-Case Design: Solutions and Needs. | Todd M. Austin, Valeria Bertacco |
| 2004 | DAC | Circuit-aware architectural simulation. | Seokwoo Lee, Shidhartha Das, Valeria Bertacco, Todd M. Austin, David T. Blaauw, Trevor N. Mudge |
| 2004 | ISLPED | Microarchitectural power modeling techniques for deep sub-micron microprocessors. | Nam Sung Kim, Taeho Kgil, Valeria Bertacco, Todd M. Austin, Trevor N. Mudge |
| 2002 | DAC | Efficient state representation for symbolic simulation. | Valeria Bertacco, Kunle Olukotun |
| 2000 | ICCAD | Smart Simulation Using Collaborative Formal and Simulation Engines. | Pei-Hsin Ho, Thomas R. Shiple, Kevin Harer, James H. Kukula, Robert F. Damiano, Valeria Bertacco, Jerry Taylor, Jiang Long |
| 1999 | DAC | Cycle-Based Symbolic Simulation of Gate-Level Synchronous Circuits. | Valeria Bertacco, Maurizio Damiani, Stefano Quer |
| 1997 | ICCAD | The disjunctive decomposition of logic functions. | Valeria Bertacco, Maurizio Damiani |
| 1996 | ICCD | Boolean Function Representation Based on Disjoint-Support Decompositions. | Valeria Bertacco, Maurizio Damiani |