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Viera Stopjakov

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

55

Venues

6

Active years

1997–2026

Best venue rank

C

Where they publish

Papers

55 indexed papers, newest first.

YearVenueTitleAuthors
2026DDECSInvestigation of MPPT Control for Hybrid Voltage Converter in Low-Power Energy Harvesters.Martin Kovc, Rbert Ondica, Richard Bagn, Daniel Arbet, Viera Stopjakov
2026DDECSSilicon-Proven Low-Dropout Regulator Designed in 65 Nm CMOS Technology.David Maljar, Rbert Ondica, Daniel Arbet, Martin Kovc, Viera Stopjakov
2026DDECSA CMOS 72 kHz - 123 MHz Tunable Oscillator for Low-Power IoT Applications.Rbert Ondica, Daniel Arbet, Martin Kovc, Miroslav Potocn, Viera Stopjakov
2025DDECSTunable Voltage Reference circuit in a standard 65nm CMOS technology.Rbert Ondica, David Maljar, Miroslav Potocn, Daniel Arbet, Viera Stopjakov
2024DDECSConstant Voltage Maximum Power Point Tracking Method for Fully Integrated Solar-Powered Energy Harvester.Adam Hudec, Rbert Ondica, Richard Ravasz, Viera Stopjakov
2022DDECSAutocalibration Approach for Improving Robustness of Analog ICs.David Maljar, Daniel Arbet, Martin Kovc, Rbert Ondica, Viera Stopjakov
2022DDECSOn-Chip Current Sensing Approaches for DC-DC Converters.Richard Ravasz, Adam Hudec, Daniel Arbet, Viera Stopjakov
2021DDECSEnhanced Reliability of Fully Differential Difference Amplifier Through On-chip Digital Calibration.David Maljar, Michal Sovck, Daniel Arbet, Viera Stopjakov
2021DDECSEKV MOS Transistor Model For Ultra Low-Voltage Bulk-Driven IC Design.Luks Nagy, Daniel Arbet, Martin Kovc, Miroslav Potocn, Michal Sovcik, Viera Stopjakov
2020DDECSDynamic Properties Of Ultra Low-Voltage Rail-to-Rail Comparator Designed In 130 nm CMOS Technology.Luks Nagy, Daniel Arbet, Martin Kovc, Miroslav Potocn, Michal Sovcik, Viera Stopjakov
2019DDECSLow Latency Hardware-Accelerated Dynamic Memory Manager for Hard Real-Time and Mixed-Criticality Systems.Luks Kohtka, Luks Nagy, Viera Stopjakov
2019DDECSInvestigation of Low-Voltage, Sub-threshold Charge Pump with Parasitics Aware Design Methodology.Martin Kovc, Daniel Arbet, Viera Stopjakov, Michal Sovcik, Luks Nagy
2019DDECSUltra Low-Voltage Rail-to-Rail Comparator Design in 130 nm CMOS Technology.Luks Nagy, Daniel Arbet, Martin Kovc, Miroslav Potocn, Viera Stopjakov
2019DDECSHigh side power MOSFET switch driver for a low-power AC/DC converter.Miroslav Potocn, Juraj Brenkus, Viera Stopjakov
2019ITCInternational Symposium on Design and Diagnostics of Electronic Circuits and Systems.Zoran Stamenkovic, Alberto Bosio, Gyrgy Cserey, Ondrej Novk, Witold A. Pleskacz, Luks Sekanina, Andreas Steininger, Goran Stojanovic, Viera Stopjakov
2018DDECSTwo-Stage Bulk-Driven Variable Gain Amplifier for Low-Voltage Applications.Daniel Arbet, Martin Kovc, Luks Nagy, Viera Stopjakov, Michal Sovcik
2018DDECSHeap Queue: A Novel Efficient Hardware Architecture of MIN/MAX Queues for Real-Time Systems.Luks Kohtka, Viera Stopjakov
2018DDECSDesign and Performance Analysis of Ultra-Low Voltage Rail-to-Rail Comparator in 130 nm CMOS Technology.Luks Nagy, Daniel Arbet, Martin Kovc, Miroslav Potocn, Viera Stopjakov
2018DDECSSelf Vth-Compensating CMOS On-Chip Rectifier for Inductively Powered Implantable Medical Devices.Miroslav Potocn, Viera Stopjakov, Martin Kovc
2018DSDA Novel Hardware-Accelerated Priority Queue for Real-Time Systems.Luks Kohtka, Luks Nagy, Viera Stopjakov
2017DDECSRocket Queue: New data sorting architecture for real-time systems.Luks Kohtka, Viera Stopjakov
2017DDECSUltra-low-voltage driver for large load capacitance in 130nm CMOS technology.Michal Sovcik, Martin Kovc, Daniel Arbet, Viera Stopjakov
2016DDECSLow-voltage bulk-driven variable gain amplifier in 130 nm CMOS technology.Daniel Arbet, Martin Kovc, Luks Nagy, Viera Stopjakov, Juraj Brenkus
2016DDECSImpedance calculation based method for AC fault analysis of mixed-signal circuits.Juraj Brenkus, Viera Stopjakov, Luks Nagy, Daniel Arbet
2016DDECSComparison of gate-driven and bulk-driven current mirror topologies.Matej Rakus, Viera Stopjakov, Daniel Arbet
2016DDECSCMOS variable-gain amplifier for low-frequency applications.Michal Sovcik, Michal Matuska, Daniel Arbet, Viera Stopjakov
2016DSDImproved Task Scheduler for Dual-Core Real-Time Systems.Luks Kohtka, Viera Stopjakov
2015DDECSFully Differential Difference Amplifier for Low-Noise Applications.Daniel Arbet, Gabriel Nagy, Martin Kovc, Viera Stopjakov
2015DDECSDesign of In AlN/GaN Heterostructure-Based Logic Cells.Luks Nagy, Viera Stopjakov, Alexander Satka
2014DDECSA novel impedance calculation method and its time efficiency evaluation.Juraj Brenkus, Viera Stopjakov, Daniel Arbet, Gbor Gyepes, Libor Majer
2014DDECSAn approach towards selection of the oscillation frequency for oscillation test of analog ICs.Martin Kovc, Daniel Arbet, Gabriel Nagy, Viera Stopjakov
2014ECAINovel architecture of a digital neuron for FFNN employing special multiplication.Roman Zlusk, Daniela Durackov, Viera Stopjakov, Luks Nagy, Vladimr Sedlk
2013DDECSEfficiency of oscillation-based BIST in 90nm CMOS active analog filters.Daniel Arbet, Gabriel Nagy, Viera Stopjakov, Gbor Gyepes
2013DDECSNumerical method for DC fault analysis simplification and simulation time reduction.Juraj Brenkus, Viera Stopjakov, Gbor Gyepes
2013DDECSDigital methods of offset compensation in 90nm CMOS operational amplifiers.Gabriel Nagy, Daniel Arbet, Viera Stopjakov
2012DDECSOBIST strategy versus parametric test - Efficiency in covering catastrophic faults in active analog filters.Daniel Arbet, Gbor Gyepes, Juraj Brenkus, Viera Stopjakov
2012DDECSApplication of IDDT test towards increasing SRAM reliability in nanometer technologies.Gbor Gyepes, Daniel Arbet, Juraj Brenkus, Viera Stopjakov
2012DDECSCurrent sensing completion detection in dual-rail asynchronous systems.Luks Nagy, Viera Stopjakov
2011DDECSIncreasing the efficiency of analog OBIST using on-chip compensation of technology variations.Daniel Arbet, Juraj Brenkus, Gbor Gyepes, Viera Stopjakov
2011DDECSComparison of iddt test efficiency in covering opens in SRAMs realised in two different technologies.Gbor Gyepes, Juraj Brenkus, Daniel Arbet, Viera Stopjakov
2011DDECSCurrent sensing methodology for completion detection in self-timed systems.Luks Nagy, Viera Stopjakov
2010DDECSThe novel approach to wideband RFIC receivers in standard CMOS process.Libor Majer, Viera Stopjakov
2010DDECSCurrent Sensing Completion Detection in deep sub-micron technologies.Luks Nagy, Viera Stopjakov
2009DDECSComparison of different test strategies on a mixed-signal circuit.Juraj Brenkus, Viera Stopjakov, Ronny Vanhooren, Anton Chichkov
2009DDECSPower devices current monitoring using horizontal and vertical magnetic force sensor.Martin Donoval, Martin Daricek, Juraj Marek, Viera Stopjakov
2008DDECSBuilt-In Current Monitor for IDDQ Testing in CMOS 90 nm Technology.Marcin J. Beresinski, Tomasz Borejko, Witold A. Pleskacz, Viera Stopjakov
2008DDECSExperimental Analog Circuit for Parametric Test Methods Efficiency Evaluation.Juraj Brenkus, Viera Stopjakov, Jozef Mihlov
2008DDECSOn-chip Integration of Magnetic Force Sensing Current Monitors.Martin Donoval, Martin Daricek, Viera Stopjakov, Juraj Marek
2008DDECSPortable Measurement Equipment for Continuous Biomedical Monitoring using Microelectrodes.Libor Majer, Viera Stopjakov
2007DDECSClockless Implementation of LEON2 for Low-Power Applications.Martin Simlastk, Viera Stopjakov, Libor Majer, Peter Malk
2006DDECSPCA Data Preprocessing for Neural Network-based Detection of Parametric Defects in Analog IC.Pavol Malosek, Viera Stopjakov
2006DDECSNew Current Monitor Using Auto Zero Voltage Comparator for IDD Testing of Mixed-signal Circuits.Vladislav Nagy, Viera Stopjakov
2000IOLTSI-V Fast IDDQ Current Sensor for On-Line Mixed-Signal/Analog Test.Martin Margala, Srdjan Dragic, Ahmed El-Abasiry, Samuel Ekpe, Viera Stopjakov
1999DATEOn-Chip Transient Current Monitor for Testing of Low Voltage CMOS IC.Viera Stopjakov, Hans A. R. Manhaeve, M. Sidiropulos
1997DATECCII+ current conveyor based BIC monitor for IViera Stopjakov, Hans A. R. Manhaeve