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Wei-Feng He

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

3

Venues

2

Active years

2007–2012

Best venue rank

C

Where they publish

Papers

3 indexed papers, newest first.

YearVenueTitleAuthors
2012ISCASA pre-emphasis circuit design for high speed on-chip global interconnect.Jianfei Jiang, Wei-Guang Sheng, Zhi-Gang Mao, Wei-Feng He
2007ISCASAn Improved Frame-Level Pipelined Architecture for High Resolution Video Motion Estimation.Wei-Feng He, Zhi-Gang Mao
2007VLSIDA Scalable Frame-Level Pipelined Architecture for FSBM Motion Estimation.Wei-Feng He, Meng-Lian Zhao, Chi-Ying Tsui, Zhi-Gang Mao