Weitong Chuang
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
6
Venues
4
Active years
1992–1995
Best venue rank
A
Where they publish
Papers
6 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 1995 | ICCAD | Power vs. delay in gate sizing: conflicting objectives? | Sachin S. Sapatnekar, Weitong Chuang |
| 1994 | ICCAD | Delay and area optimization for compact placement by gate resizing and relocation. | Weitong Chuang, Ibrahim N. Hajj |
| 1994 | VTS | Circuit-level dictionaries of CMOS bridging faults. | Terry Lee, Weitong Chuang, Ibrahim N. Hajj, W. Kent Fuchs |
| 1993 | ICCAD | A unified algorithm for gate sizing and clock skew optimization to minimize sequential circuit area. | Weitong Chuang, Sachin S. Sapatnekar, Ibrahim N. Hajj |
| 1993 | ISCAS | Fast Mixed-Mode Simulation for Accurate MOS Bridging Fault Detection. | Weitong Chuang, Ibrahim N. Hajj |
| 1992 | ICASSP | Estimating rotation speed from projections in SAR. | Weitong Chuang, Thomas S. Huang |