| 2026 | ASPDAC | C3PO: Commercial-Quality Global Placement via Coherent, Concurrent Timing, Routability, and Wirelength Optimization. | Yi-Chen Lu, Hao-Hsiang Hsiao, Rongjian Liang, Wen-Hao Liu, Haoxing Ren |
| 2025 | ASPDAC | Paired-Spacing-Constrained Package Routing with Net Ordering Optimization. | Yi-Sian Ciou, Ying-Jie Jiang, Yi-Yu Liu, Shao-Yun Fang, Wen-Hao Liu |
| 2025 | DAC | Reinforcement Learning-Driven Window Selection for Enhanced Window-Based Rip-up and Reroute in Chip Detailed Routing. | Yu-Chan Keng, Yu-Chun Pai, Wen-Hao Liu, Haoxing Ren, Danny Liu, Rongjian Liang, Mark Ho, Anthony Agnesina, Yih-Lang Li |
| 2025 | DAC | Late Breaking Results: An Efficient and Scalable Track Assignment with GPU Parallelism. | Genggeng Liu, Pengcheng Huang, Zepeng Li, Wen-Hao Liu, Xing Huang, Wenzhong Guo |
| 2025 | ICCAD | (Invited) Generalized GPU-Accelerated Dynamic Programming with Application to Mixed-Cell-Height Detailed Placement. | Da-Wei Huang, Shao-Yun Fang, Wen-Hao Liu |
| 2025 | ICCAD | Invited Paper: 2025 ICCAD CAD Contest Problem C: Incremental Placement Optimization Beyond Detailed Placement: Simultaneous Gate Sizing, Buffering, and Cell Relocation. | Yi-Chen Lu, Rongjian Liang, Wen-Hao Liu, Haoxing Ren |
| 2025 | ICCAD | Leveraging GPU for Better Detailed Placement Quality. | Chen-Han Lu, Wen-Hao Liu, Haoxing Ren, Ting-Chi Wang |
| 2023 | ICCAD | Delay-Matching Routing for Advanced Packages. | Chun-An Lee, Wen-Hao Liu, Gary Lin, Tsung-Yi Ho |
| 2021 | DATE | ALIFRouter: A Practical Architecture-Level Inter-FPGA Router for Logic Verification. | Zhen Zhuang, Xing Huang, Genggeng Liu, Wenzhong Guo, Weikang Qian, Wen-Hao Liu |
| 2020 | DATE | MiniDelay: Multi-Strategy Timing-Aware Layer Assignment for Advanced Technology Nodes. | Xinghai Zhang, Zhen Zhuang, Genggeng Liu, Xing Huang, Wen-Hao Liu, Wenzhong Guo, Ting-Chi Wang |
| 2019 | ASPDAC | Latency constraint guided buffer sizing and layer assignment for clock trees with useful skew. | Necati Uysal, Wen-Hao Liu, Rickard Ewetz |
| 2017 | ASPDAC | Delay-driven layer assignment for advanced technology nodes. | Szu-Yuan Han, Wen-Hao Liu, Rickard Ewetz, Cheng-Kok Koh, Kai-Yuan Chao, Ting-Chi Wang |
| 2016 | ASPDAC | Negotiation-based track assignment considering local nets. | Man-Pan Wong, Wen-Hao Liu, Ting-Chi Wang |
| 2016 | HCI | Augmenting VR/AR Applications with EEG/EOG Monitoring and Oculo-Vestibular Recoupling. | John K. Zao, Tzyy-Ping Jung, Hung-Ming Chang, Tchin Tze Gan, Yu-Te Wang, Yuan-Pin Lin, Wen-Hao Liu, Guang-Yu Zheng, Chin-Kuo Lin, Chia-Hung Lin, Yu-Yi Chien, Fang-Cheng Lin, Yi-Pai Huang, Sergio Jose Rodriguez Mendez, Felipe A. Medeiros |
| 2016 | ICCAD | MrDP: multiple-row detailed placement of heterogeneous-sized cells for advanced nodes. | Yibo Lin, Bei Yu, Xiaoqing Xu, Jhih-Rong Gao, Natarajan Viswanathan, Wen-Hao Liu, Zhuo Li, Charles J. Alpert, David Z. Pan |
| 2014 | DAC | Floorplanning and Signal Assignment for Silicon Interposer-based 3D ICs. | Wen-Hao Liu, Min-Sheng Chang, Ting-Chi Wang |
| 2014 | DAC | Density-aware Detailed Placement with Instant Legalization. | Sergiy Popovych, Hung-Hao Lai, Chieh-Min Wang, Yih-Lang Li, Wen-Hao Liu, Ting-Chi Wang |
| 2014 | DATE | Metal layer planning for silicon interposers with consideration of routability and manufacturing cost. | Wen-Hao Liu, Tzu-Kai Chien, Ting-Chi Wang |
| 2014 | ICCAD | A resource-level parallel approach for global-routing-based routing congestion estimation and a method to quantify estimation accuracy. | Wen-Hao Liu, Zhen-Yu Peng, Ting-Chi Wang |
| 2013 | DAC | Optimization of placement solutions for routability. | Wen-Hao Liu, Cheng-Kok Koh, Yih-Lang Li |
| 2013 | DAC | Routing congestion estimation with real design constraints. | Wen-Hao Liu, Yaoguang Wei, Cliff C. N. Sze, Charles J. Alpert, Zhuo Li, Yih-Lang Li, Natarajan Viswanathan |
| 2012 | ASPDAC | Topology-aware buffer insertion and GPU-based massively parallel rerouting for ECO timing optimization. | Yen-Hung Lin, Yun-Jian Lo, Hian-Syun Tong, Wen-Hao Liu, Yih-Lang Li |
| 2012 | ICCAD | A fast maze-free routing congestion estimator with hybrid unilateral monotonic routing. | Wen-Hao Liu, Yih-Lang Li, Cheng-Kok Koh |
| 2011 | ASPDAC | Negotiation-based layer assignment for via count and via overflow minimization. | Wen-Hao Liu, Yih-Lang Li |
| 2011 | ICCAD | High-quality global routing for multiple dynamic supply voltage designs. | Wen-Hao Liu, Yih-Lang Li, Kai-Yuan Chao |
| 2010 | ASPDAC | Minimizing clock latency range in robust clock tree synthesis. | Wen-Hao Liu, Yih-Lang Li, Hui-Chi Chen |
| 2010 | DAC | Multi-threaded collision-aware global routing with bounded-length maze routing. | Wen-Hao Liu, Wei-Chun Kao, Yih-Lang Li, Kai-Yuan Chao |
| 2009 | ASPDAC | Efficient simulated evolution based rerouting and congestion-relaxed layer assignment on 3-D global routing. | Ke-Ren Dai, Wen-Hao Liu, Yih-Lang Li |