Topology-aware buffer insertion and GPU-based massively parallel rerouting for ECO timing optimization.
Yen-Hung Lin, Yun-Jian Lo, Hian-Syun Tong, Wen-Hao Liu, Yih-Lang Li
Browse the full ASPDAC paper archive.
Yen-Hung Lin, Yun-Jian Lo, Hian-Syun Tong, Wen-Hao Liu, Yih-Lang Li
Browse the full ASPDAC paper archive.