| 2001 | ISCAS | A pattern compaction technique for power estimation based on power sensitivity information. | Chih-Yang Hsu, Chaur-Wen Wei, Wen-Zen Shen |
| 2001 | ISCAS | Grouped input power sensitive transition an input sequence compaction technique for power estimation. | Heng-Liang Huang, Yeong-Ren Chen, Jing-Yang Jou, Wen-Zen Shen |
| 2000 | ASPDAC | A new method for constructing IP level power model based on power sensitivity. | Heng-Liang Huang, Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou |
| 1997 | ASPDAC | CB-Power: a hierarchical cell-based power characterization and estimation environment for static CMOS circuits. | Wen-Zen Shen, Jiing-Yuan Lin, Jyh-Ming Lu |
| 1997 | ICCAD | A power modeling and characterization method for macrocells using structure information. | Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou |
| 1996 | ICCAD | An iterative area/performance trade-off algorithm for LUT-based FPGA technology mapping. | Juinn-Dar Huang, Jing-Yang Jou, Wen-Zen Shen |
| 1996 | ICCAD | A power modeling and characterization method for the CMOS standard cell library. | Jiing-Yuan Lin, Wen-Zen Shen, Jing-Yang Jou |
| 1995 | ASPDAC | Transistor reordering rules for power reduction in CMOS gates. | Wen-Zen Shen, Jiing-Yuan Lin, Fong-Wen Wang |
| 1995 | DAC | Lambda Set Selection in Roth-Karp Decomposition for LUT-Based FPGA Technology Mapping. | Wen-Zen Shen, Juinn-Dar Huang, Shih-Min Chao |
| 1995 | ICCAD | Compatible class encoding in Roth-Karp decomposition for two-output LUT architecture. | Juinn-Dar Huang, Jing-Yang Jou, Wen-Zen Shen |
| 1994 | ICCAD | A cell-based power estimation in CMOS combinational circuits. | Jiing-Yuan Lin, Tai-Chien Liu, Wen-Zen Shen |
| 1994 | ISCAS | On the Reduction of Recorder Buffer Size for Discrete Fourier Transform Processor Design. | Wen-Zen Shen, Yi-Hsin Tao, Lan-Rong Dung |
| 1992 | DAC | Coalgebraic Division for Multilevel Logic Synthesis. | Wen-Jun Hsu, Wen-Zen Shen |
| 1990 | DAC | A Parallel Pattern Mixed-Level Fault Simulator. | Tyh-Song Hwang, Chung Len Lee, Wen-Zen Shen, Ching Ping Wu |
| 1990 | ITC | Single-fault fault collapsing analysis in sequential logic circuits. | Jwu E. Chen, Chung-Len Lee, Wen-Zen Shen |