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Wim Dehaene

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

36

Venues

10

Active years

2003–2025

Best venue rank

A*

Where they publish

Papers

36 indexed papers, newest first.

YearVenueTitleAuthors
2025ISCASCIPL: A Fast and Low-Power Level Shifter for Wide-Range Voltage Conversion.Weijie Jiang, Xinfa Zheng, Jiacong Sun, Georges G. E. Gielen, Marian Verhelst, Wim Dehaene
2025ISCAS3D IGZO Charge-Coupled Memory DTCO & STCO Analysis for Compute-near-Memory Applications.Bowen Wang, Khakim Akhunov, Hyungrock Oh, Fernando Garca-Redondo, Yukai Chen, Arvind Sharma, Jiacong Sun, Sahan Gamage, Maarten Rosmeulen, Swaraj Bandhu Mahato, Rishabh Kishore, Subhali Subhechha, Jaydeep P. Kulkarni, Marian Verhelst, Dwaipayan Biswas, Marie Garcia Bardon, Wim Dehaene, Julien Ryckaert
2023ISCASAn Active-Pixel Readout Circuit Technique towards all LTPS-TFT-on-foil Large-Area Imagers with Inherent Nonlinearity Compensation.Mohit Dandekar, Kris Myny, Wim Dehaene
2021IJCNNNoise tolerant ternary weight deep neural networks for analog in-memory inference.Jonas Doevenspeck, Peter Vrancx, Nathan Laubeuf, Arindam Mallik, Peter Debacker, Diederik Verkest, Rudy Lauwereins, Wim Dehaene
2019DATEDual-gate self-aligned a-InGaZnO transistor model for flexible circuit applications.Florian De Roose, Hikmet Celiker, Jan Genoe, Wim Dehaene, Kris Myny
2017DATEMitigation of sense amplifier degradation using input switching.Daniel Kraak, Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
2017DATEDVAFS: Trading computational accuracy for energy through dynamic-voltage-accuracy-frequency-scaling.Bert Moons, Roel Uytterhoeven, Wim Dehaene, Marian Verhelst
2017ICASSPMassive MIMO processing at the semiconductor edge: Exploiting the system and circuit margins for power savings.Yanxiang Huang, Claude Desset, Andr Bourdoux, Wim Dehaene, Liesbet Van der Perre
2016DATETOTAL: TRNG on-the-fly testing for attack detection using Lightweight hardware.Bohan Yang, Vladimir Rozic, Nele Mentens, Wim Dehaene, Ingrid Verbauwhede
2016ETSRead path degradation analysis in SRAM.Innocent Agbo, Mottaqiallah Taouil, Said Hamdioui, Pieter Weckx, Stefan Cosemans, Francky Catthoor, Wim Dehaene
2015DACHighly efficient entropy extraction for true random number generators on FPGAs.Vladimir Rozic, Bohan Yang, Wim Dehaene, Ingrid Verbauwhede
2015DATEImpact of interconnect multiple-patterning variability on SRAMs.Ioannis Karageorgos, Michele Stucchi, Praveen Raghavan, Julien Ryckaert, Zsolt Tokei, Diederik Verkest, Rogier Baert, Sushil Sakhare, Wim Dehaene
2015DATEEmbedded HW/SW platform for on-the-fly testing of true random number generators.Bohan Yang, Vladimir Rozic, Nele Mentens, Wim Dehaene, Ingrid Verbauwhede
2014ISCASDesign of a frequency reference based on a PVT-independent transmission line delay.Florian De Roose, Valentijn De Smedt, Wouter Volkaerts, Michiel Steyaert, Georges G. E. Gielen, Patrick Reynaert, Wim Dehaene
2013DATEA low-power and low-voltage BBPLL-based sensor interface in 130nm CMOS for wireless sensor networks.Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene, Georges G. E. Gielen
2013DSDMemristor-Based (ReRAM) Data Memory Architecture in ASIP Design.Matthias Hartmann, Praveen Raghavan, Liesbet Van der Perre, Prashant Agrawal, Wim Dehaene
2012DATEUltra low power litho friendly local assist circuitry for variability resilient 8T SRAM.Vibhu Sharma, Stefan Cosemans, Maryam Ashouei, Jos Huisken, Francky Catthoor, Wim Dehaene
2012DATEDesign of a low-energy data processing architecture for WSN nodes.Cedric Walravens, Wim Dehaene
2011ISCASCircuits and systems engineering education through interdisciplinary team-based design projects.Wim Dehaene, Georges G. E. Gielen, Geert Deconinck, Johan Driesen, Marc Moonen, Bart Nauwelaers, Chris Van Hoof, Patrick Wambacq
2010DATEAn RDL-configurable 3D memory tier to replace on-chip SRAM.Marco Facchini, Paul Marchal, Francky Catthoor, Wim Dehaene
2010ISCASAll-digital differential VCO-based A/D conversion.Jorg Daniels, Wim Dehaene, Michiel Steyaert
2010ISCASA 0.5 V-1.4 V supply-independent frequency-based analog-to-digital converter with fast start-up time for wireless sensor networks.Wouter Volkaerts, Bart Marien, Hans Danneels, Valentijn De Smedt, Patrick Reynaert, Wim Dehaene, Georges G. E. Gielen
2009DACActivaSC: a highly efficient and non-intrusive extension for activity-based analysis of SystemC models.Cedric Walravens, Yves Vanderperren, Wim Dehaene
2009DATESystem-level power/performance evaluation of 3D stacked DRAMs for mobile applications.Marco Facchini, Trevor E. Carlson, Anselme Vignon, Martin Palkovic, Francky Catthoor, Wim Dehaene, Luca Benini, Paul Marchal
2009DATEA novel DRAM architecture as a low leakage alternative for SRAM caches in a 3D interconnect context.Anselme Vignon, Stefan Cosemans, Wim Dehaene, Pol Marchal, Marco Facchini
2008ISCASA/D conversion using an Asynchronous Delta-Sigma Modulator and a time-to-digital converter.Jorg Daniels, Wim Dehaene, Michiel Steyaert, Andreas Wiesbauer
2008ISCASA low-power mixing DAC IR-UWB-receiver.Hans Danneels, Marian Verhelst, Pieter Palmers, Wim Vereecken, Bruno Boury, Wim Dehaene, Michiel Steyaert, Georges G. E. Gielen
2006DATEFrom UML/SysML to Matlab/Simulink: current state and future perspectives.Yves Vanderperren, Wim Dehaene
2006ICCADUML for ESL design: basic principles, tools, and applications.Wolfgang Mueller, Alberto Rosti, Sara Bocchio, Elvinia Riccobene, Patrizia Scandurra, Wim Dehaene, Yves Vanderperren
2005DATEEnergy Efficiency of the IEEE 802.15.4 Standard in Dense Wireless Microsensor Networks: Modeling and Improvement Perspectives.Bruno Bougard, Francky Catthoor, Denis C. Daly, Anantha P. Chandrakasan, Wim Dehaene
2005DATEAnalog and Digital Circuit Design in 65 nm CMOS: End of the Road?Georges G. E. Gielen, Wim Dehaene, Phillip Christie, Dieter Draxelmayr, Edmond Janssens, Karen Maex, Ted Vucurevich
2005DATEUML 2 and SysML: An Approach to Deal with Complexity in SoC/NoC Design.Yves Vanderperren, Wim Dehaene
2005DATESystematic Analysis of Energy and Delay Impact of Very Deep Submicron Process Variability Effects in Embedded SRAM Modules.Hua Wang, Miguel Miranda, Wim Dehaene, Francky Catthoor, Karen Maex
2005FDLThe SysML profile for embedded system modelling.Yves Vanderperren, Wim Dehaene
2004ISLPEDArchitectures for low power ultra-wideband radio receivers in the 3.1-5GHz band for data rates < 10Mbps.Marian Verhelst, Wim Vereecken, Michiel Steyaert, Wim Dehaene
2003DATEA Mixed Abstraction Level Co-Simulation Case Study Using SystemC for System on Chip Verification.Ali Sayinta, Gorkem Canverdi, Marc Pauwels, Amer Alshawa, Wim Dehaene