| 2022 | ASPDAC | Algorithm and Hardware Co-design for Reconfigurable CNN Accelerator. | Hongxiang Fan, Martin Ferianc, Zhiqiang Que, He Li, Shuanglong Liu, Xinyu Niu, Wayne Luk |
| 2021 | DAC | High-Performance FPGA-based Accelerator for Bayesian Neural Networks. | Hongxiang Fan, Martin Ferianc, Miguel Rodrigues, Hongyu Zhou, Xinyu Niu, Wayne Luk |
| 2020 | FCCM | Optimizing Reconfigurable Recurrent Neural Networks. | Zhiqiang Que, Hiroki Nakahara, Eriko Nurvitadhi, Hongxiang Fan, Chenglong Zeng, Jiuxi Meng, Xinyu Niu, Wayne Luk |
| 2020 | ICCD | Optimizing FPGA-Based CNN Accelerator Using Differentiable Neural Architecture Search. | Hongxiang Fan, Martin Ferianc, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk |
| 2020 | PLDI | On the challenges in programming mixed-precision deep neural networks. | Ruizhe Zhao, Wayne Luk, Chao Xiong, Xinyu Niu, Kuen Hung Tsoi |
| 2018 | FPGA | A Low-Power Deconvolutional Accelerator for Convolutional Neural Network Based Segmentation on FPGA: Abstract Only. | Shuanglong Liu, Xinyu Niu, Wayne Luk |
| 2018 | FPGA | Automatic Optimising CNN with Depthwise Separable Convolution on FPGA: (Abstact Only). | Ruizhe Zhao, Xinyu Niu, Wayne Luk |
| 2018 | FPL | Reconfigurable Acceleration of 3D-CNNs for Human Action Recognition with Block Floating-Point Representation. | Hongxiang Fan, Ho-Cheung Ng, Shuanglong Liu, Zhiqiang Que, Xinyu Niu, Wayne Luk |
| 2018 | FPL | Towards Efficient Convolutional Neural Network for Domain-Specific Applications on FPGA. | Ruizhe Zhao, Ho-Cheung Ng, Wayne Luk, Xinyu Niu |
| 2017 | FPL | F-C3D: FPGA-based 3-dimensional convolutional neural network. | Hongxiang Fan, Xinyu Niu, Qiang Liu, Wayne Luk |
| 2016 | FPL | EURECA compilation: Automatic optimisation of cycle-reconfigurable circuits. | Xinyu Niu, Nicholas Ng, Tomofumi Yuki, Shaojun Wang, Nobuko Yoshida, Wayne Luk |
| 2016 | FPL | Connect on the fly: Enhancing and prototyping of cycle-reconfigurable modules. | Hao Zhou, Xinyu Niu, Junqi Yuan, Lingli Wang, Wayne Luk |
| 2015 | FCCM | Architectures and Precision Analysis for Modelling Atmospheric Variables with Chaotic Behaviour. | Francis P. Russell, Peter D. Dben, Xinyu Niu, Wayne Luk, Tim N. Palmer |
| 2015 | FPGA | EURECA: On-Chip Configuration Generation for Effective Dynamic Data Access. | Xinyu Niu, Wayne Luk, Yu Wang |
| 2014 | ISPA | Elastic Management of Reconfigurable Accelerators. | Paul Grigoras, Max Tottenham, Xinyu Niu, Jos Gabriel F. Coutinho, Wayne Luk |
| 2013 | FCCM | Automating Elimination of Idle Functions by Run-Time Reconfiguration. | Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu |
| 2013 | FPGA | Automating resource optimisation in reconfigurable design (abstract only). | Xinyu Niu, Thomas C. P. Chau, Qiwei Jin, Wayne Luk, Qiang Liu |
| 2013 | FPL | A scalable design approach for stencil computation on reconfigurable clusters. | Xinyu Niu, Jos Gabriel F. Coutinho, Wayne Luk |
| 2012 | FPL | Exploiting run-time reconfiguration in stencil computation. | Xinyu Niu, Qiwei Jin, Wayne Luk, Qiang Liu, Oliver Pell |
| 2011 | FPL | Reconfiguring Distributed Applications in FPGA Accelerated Cluster with Wireless Networking. | Xinyu Niu, Kuen Hung Tsoi, Wayne Luk |