| 2026 | ASPDAC | PigMap3: A Physically Aware Incremental Mapping Framework with On-the-fly Post-Layout Critical Path Tracking. | Hongyang Pan, Cunqing Lan, Zhiang Wang, Xuan Zeng, Fan Yang, Keren Zhu |
| 2026 | ISCAS | RC-Scaled Timing-Driven Routing: Bridging Targeted Timing Optimization and Massively. | Parallel Global Routing, Chuyu Wang, Zecheng Xu, Boxiang Song, Zhiang Wang, Fan Yang, Keren Zhu, Xuan Zeng |
| 2026 | ISCAS | Layout-Aware Standard Cell Synthesis via Reparameterization Multi-Task Bayesian Optimization. | Zhouyang Wu, Ruiyu Lyu, Keren Zhu, Zhiang Wang, Zhaori Bi, Changhao Yan, Xuan Zeng |
| 2026 | SIGCOMM | AIDA: Accelerating Root Cause Analysis for Multi-Vendor Device Failures with LLM-Powered Reasoning. | Haoran Xu, Xuan Zeng, Xumiao Zhang, Xiaoxi Zhang, Yang Lv, Peng Zhang, Deke Guo, Ennan Zhai |
| 2025 | DAC | MARIO: A Superadditive Multi-Algorithm Interworking Optimization Framework for Analog Circuit Sizing. | Wangzhen Li, Yuan Meng, Ruiyu Lyu, Changhao Yan, Keren Zhu, Zhaori Bi, Dian Zhou, Xuan Zeng |
| 2025 | DAC | New Time-Domain Preconditioners for HB Jacobian of RF Circuits. | Chenyi Tan, Yangfeng Su, Fan Yang, Xuan Zeng |
| 2025 | DAC | Look Before You Leap: A Self-Review Bayesian Optimization Method for Constrained High-Dimensional Design Space Exploration. | Xuyang Zhao, Yiyang Zhao, Zheng Wu, Tianning Gao, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2025 | DATE | ELMap: Area-Driven LUT Mapping with $k$-LUT Network Exact Synthesis. | Hongyang Pan, Keren Zhu, Fan Yang, Zhufei Chu, Xuan Zeng |
| 2025 | DATE | INTO-OA: Interpretable Topology Optimization for Operational Amplifiers. | Jinyi Shen, Fan Yang, Li Shang, Zhaori Bi, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2025 | DATE | DAMIL-DCIM: A Digital CIM Layout Synthesis Framework with Dataflow-Aware Floorplan and MILP-Based Detailed Placement. | Chuyu Wang, Ke Hu, Fan Yang, Keren Zhu, Xuan Zeng |
| 2025 | ICCAD | LCTMwalk: GPU-Accelerated Transient Thermal Simulation for Liquid-Cooled 2.5D/3D ICs via Random Walks on Circuit Networks of Modified Compact Thermal Models. | Zhixuan Dong, Yonghan Luo, Yuan Meng, Changhao Yan, Zhaori Bi, Keren Zhu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2025 | ICCAD | NSTherm: An Error-Bounded Network-Stochastic Fusion Thermal Simulator for Geometry-Adaptable Chiplets via Diffeomorphic Mapping and Neural-Guided Variance Reduction. | Yuan Meng, Yuyan Wang, Zhixuan Dong, Yonghan Luo, Changhao Yan, Keren Zhu, Zhaori Bi, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2025 | ICCAD | BAGNet: A Boundary-Aware Graph Neural Network for SRAM Yield Analysis in Post-LayoutSimulation. | Haoyang Sang, Changhao Yan, Zhaori Bi, Keren Zhu, Xuan Zeng |
| 2025 | ICCAD | Seeing Through Designs: Attention-Based Knowledge Transfer for Preference-Guided Microarchitecture Search. | Yiyang Zhao, Xuyang Zhao, Zhaori Bi, Ming Zhu, Qiwei Zhan, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2025 | NSDI | Learning Production-Optimized Congestion Control Selection for Alibaba Cloud CDN. | Xuan Zeng, Haoran Xu, Chen Chen, Xumiao Zhang, Xiaoxi Zhang, Xu Chen, Guihai Chen, Yubing Qiu, Yiping Zhang, Chong Hao, Ennan Zhai |
| 2025 | SIGCOMM | Towards LLM-Based Failure Localization in Production-Scale Networks. | Chenxu Wang, Xumiao Zhang, Runwei Lu, Xianshang Lin, Xuan Zeng, Xinlei Zhang, Zhe An, Gongwei Wu, Jiaqi Gao, Chen Tian, Guihai Chen, Guyue Liu, Yuhong Liao, Tao Lin, Dennis Cai, Ennan Zhai |
| 2025 | USENIX | Roaming Free in the VR World with MP2. | Yifei Xu, Xumiao Zhang, Yuning Chen, Pan Hu, Xuan Zeng, Zhilong Zheng, Xianshang Lin, Yanmei Liu, Songwu Lu, Z. Morley Mao, Wan Du, Dennis Cai, Ennan Zhai, Yunfei Ma |
| 2024 | ASPDAC | MACRO: Multi-agent Reinforcement Learning-based Cross-layer Optimization of Operational Amplifier. | Zihao Chen, Songlei Meng, Fan Yang, Li Shang, Xuan Zeng |
| 2024 | ASPDAC | A Study on Exploring and Exploiting the High-dimensional Design Space for Analog Circuit Design Automation : (Invited Paper). | Ruiyu Lyu, Yuan Meng, Aidong Zhao, Zhaori Bi, Keren Zhu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2024 | ASPDAC | Asynchronous Batch Constrained Multi-Objective Bayesian Optimization for Analog Circuit Sizing. | Xuyang Zhao, Zhaori Bi, Changhao Yan, Fan Yang, Ye Lu, Dian Zhou, Xuan Zeng |
| 2024 | DAC | Artisan: Automated Operational Amplifier Design via Domain-specific Large Language Model. | Zihao Chen, Jiangli Huang, Yiting Liu, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng |
| 2024 | DAC | HiMOSS: A Novel High-dimensional Multi-objective Optimization Method via Adaptive Gradient-Based Subspace Sampling for Analog Circuit Sizing. | Tianchen Gu, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Tao Cui, Xin Liu, Zaikun Zhang, Xuan Zeng |
| 2024 | DAC | EVDMARL: Efficient Value Decomposition-based Multi-Agent Reinforcement Learning with Domain-Randomization for Complex Analog Circuit Design Migration. | Handa Sun, Zhaori Bi, Wenning Jiang, Ye Lu, Changhao Yan, Fan Yang, Wenchuang Hu, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2024 | DAC | Efficient ILT via Multigrid-Schwartz Method. | Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Dian Zhou, Xuan Zeng |
| 2024 | DATE | tSS-BO: Scalable Bayesian Optimization for Analog Circuit Sizing via Truncated Subspace Sampling. | Tianchen Gu, Jiaqi Wang, Zhaori Bi, Changhao Yan, Fan Yang, Yajie Qin, Tao Cui, Xuan Zeng |
| 2024 | DATE | Circuits Physics Constrained Predictor of Static IR Drop with Limited Data. | Yuan Meng, Ruiyu Lyu, Zhaori Bi, Changhao Yan, Fan Yang, Wenchuang Hu, Dian Zhou, Xuan Zeng |
| 2024 | DATE | A Semi-Tensor Product based Circuit Simulation for SAT-sweeping. | Hongyang Pan, Ruibing Zhang, Yinshui Xia, Lunyao Wang, Fan Yang, Xuan Zeng, Zhufei Chu |
| 2024 | ICCAD | The Power of Graph Signal Processing for Chip Placement Acceleration. | Yiting Liu, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang |
| 2024 | ICCAD | AnalogGym: An Open and Practical Testing Suite for Analog Circuit Synthesis. | Jintao Li, Haochang Zhi, Ruiyu Lyu, Wangzhen Li, Zhaori Bi, Keren Zhu, Yanhan Zeng, Weiwei Shan, Changhao Yan, Fan Yang, Yun Li, Xuan Zeng |
| 2024 | ICCAD | Revisiting sensitivity-based analog sizing with derivative-aware Bayesian optimization and error-suppressed adjoint analysis. | Ruiyu Lyu, Aidong Zhao, Yuan Meng, Keren Zhu, Zhaori Bi, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng |
| 2024 | ICCAD | Physically Aware Synthesis Revisited: Guiding Technology Mapping with Primitive Logic Gate Placement. | Hongyang Pan, Cunqing Lan, Yiting Liu, Zhiang Wang, Li Shang, Xuan Zeng, Fan Yang, Keren Zhu |
| 2024 | UAI | Exploring High-dimensional Search Space via Voronoi Graph Traversing. | Aidong Zhao, Xuyang Zhao, Tianchen Gu, Zhaori Bi, Xinwei Sun, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng |
| 2023 | DAC | FPDsim: A Structural Simulator For Power Grid Analysis Of Flat Panel Display. | Chengtao An, Chunqiao Li, Xiangqi Li, Yangfeng Su, Fan Yang, Xuan Zeng |
| 2023 | DAC | Efficient ILT via Multi-level Lithography Simulation. | Shuyuan Sun, Fan Yang, Bei Yu, Li Shang, Xuan Zeng |
| 2023 | DAC | Automated Design of Complex Analog Circuits with Multiagent based Reinforcement Learning. | Jinxin Zhang, Jiarui Bao, Zhangcheng Huang, Xuan Zeng, Ye Lu |
| 2023 | DAC | cVTS: A Constrained Voronoi Tree Search Method for High Dimensional Analog Circuit Synthesis. | Aidong Zhao, Xianan Wang, Zixiao Lin, Zhaori Bi, Xudong Li, Changhao Yan, Fan Yang, Li Shang, Dian Zhou, Xuan Zeng |
| 2023 | DATE | Automated and Agile Design of Layout Hotspot Detector via Neural Architecture Search. | Zihao Chen, Fan Yang, Li Shang, Xuan Zeng |
| 2023 | ICCAD | Sphinx: A Hybrid Boolean Processor-FPGA Hardware Emulation System. | Ruiyao Pu, Yiwei Sun, Pei-Hsin Ho, Fan Yang, Li Shang, Xuan Zeng |
| 2023 | SIGCOMM | CellFusion: Multipath Vehicle-to-Cloud Video Streaming with Network Coding in the Wild. | Yunzhe Ni, Zhilong Zheng, Xianshang Lin, Fengyu Gao, Xuan Zeng, Yirui Liu, Tao Xu, Hua Wang, Zhidong Zhang, Senlang Du, Guang Yang, Yuanchao Su, Dennis Cai, Hongqiang Harry Liu, Chenren Xu, Ennan Zhai, Yunfei Ma |
| 2022 | ASPDAC | A Novel and Efficient Bayesian Optimization Approach for Analog Designs with Multi-Testbench. | Jingyao Zhao, Changhao Yan, Zhaori Bi, Fan Yang, Xuan Zeng, Dian Zhou |
| 2022 | DAC | Floorplanning with graph attention. | Yiting Liu, Ziyi Ju, Zhengming Li, Mingzhi Dong, Hai Zhou, Jia Wang, Fan Yang, Xuan Zeng, Li Shang |
| 2022 | DAC | An efficient yield optimization method for analog circuits via gaussian process classification and varying-sigma sampling. | Xiaodong Wang, Changhao Yan, Fan Yang, Dian Zhou, Xuan Zeng |
| 2022 | DATE | Topology Optimization of Operational Amplifier in Continuous Space via Graph Embedding. | Jialin Lu, Liangbo Lei, Fan Yang, Li Shang, Xuan Zeng |
| 2022 | DATE | Efficient Hotspot Detection via Graph Neural Network. | Shuyuan Sun, Yiyang Jiang, Fan Yang, Bei Yu, Xuan Zeng |
| 2022 | ICCAD | A High-Precision Stochastic Solver for Steady-State Thermal Analysis with Fourier Heat Transfer Robin Boundary Conditions. | Longlong Yang, Cuiyang Ding, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2022 | ISCAS | A Batch Bayesian Optimization Approach For Analog Circuit Synthesis Based On Multi-Points Selection Criterion. | Xu Fu, Changhao Yan, Zhaori Bi, Fan Yang, Dian Zhou, Xuan Zeng |
| 2022 | ISCAS | SAT-based Scheduling Algorithm for High-level Synthesis Considering Resource Sharing. | Hao Jiang, Fan Yang, Changhao Yan, Xuan Zeng |
| 2022 | ISCAS | Adversarial Sample Generation for Lithography Hotspot Detection. | Shuyuan Sun, Yiyang Jiang, Fan Yang, Xuan Zeng |
| 2021 | ASPDAC | Bayesian Inference on Introduced General Region: An Efficient Parametric Yield Estimation Method for Integrated Circuits. | Zhengqi Gao, Zihao Chen, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng |
| 2021 | ASPDAC | A Robust Batch Bayesian Optimization for Analog Circuit Synthesis via Local Penalization. | Jiangli Huang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2021 | DAC | NeurFill: Migrating Full-Chip CMP Simulators to Neural Networks for Model-Based Dummy Filling Synthesis. | Junzhe Cai, Changhao Yan, Yuzhe Ma, Bei Yu, Dian Zhou, Xuan Zeng |
| 2021 | DAC | Automated Compensation Scheme Design for Operational Amplifier via Bayesian Optimization. | Jialin Lu, Liangbo Lei, Fan Yang, Changhao Yan, Xuan Zeng |
| 2021 | DATE | An Efficient Yield Estimation Method for Layouts of High Dimensional and High Sigma SRAM Arrays. | Yue Shen, Changhao Yan, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2021 | ICCAD | When Wafer Failure Pattern Classification Meets Few-shot Learning and Self-Supervised Learning. | Hao Geng, Fan Yang, Xuan Zeng, Bei Yu |
| 2021 | ICCAD | Accelerate Logic Re-simulation on GPU via Gate/Event Parallelism and State Compression. | Cheng Zeng, Fan Yang, Xuan Zeng |
| 2021 | ICCAD | Hotspot Detection via Multi-task Learning and Transformer Encoder. | Binwu Zhu, Ran Chen, Xinyun Zhang, Fan Yang, Xuan Zeng, Bei Yu, Martin D. F. Wong |
| 2021 | IGARSS | A Near-Field Fast Time-Frequency Joint 3-D Imaging Algorithm Based on Aperture Linearization. | Xuan Zeng, Yuxin Ma, Zhongyu Li, Junjie Wu, Jianyu Yang |
| 2021 | ISCAS | Bayesian Optimization Approach for Analog Circuit Design Using Multi-Task Gaussian Process. | Jiangli Huang, Shuhan Zhang, Cong Tao, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2020 | ASPDAC | Bayesian Methods for the Yield Optimization of Analog and SRAM Circuits. | Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng |
| 2020 | DAC | An Efficient and Robust Yield Optimization Method for High-dimensional SRAM Circuits. | Xiaodong Wang, Tianchen Gu, Changhao Yan, Xiulong Wu, Fan Yang, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2020 | DAC | An Efficient Asynchronous Batch Bayesian Optimization Approach for Analog Circuit Synthesis. | Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng |
| 2020 | DATE | An Efficient Bayesian Optimization Approach for Analog Circuit Synthesis via Sparse Gaussian Process Modeling. | Biao He, Shuhan Zhang, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2020 | ICCAD | Hotspot Detection via Attention-based Deep Layout Metric Learning. | Hao Geng, Haoyu Yang, Lu Zhang, Jin Miao, Fan Yang, Xuan Zeng, Bei Yu |
| 2020 | ISCAS | An Efficient Memory Partitioning Approach for Multi-Pattern Data Access in STT-RAM. | Binbin Liu, Fan Yang, Dian Zhou, Xuan Zeng |
| 2020 | ISCAS | A Mixed-Variable Bayesian Optimization Approach for Analog Circuit Synthesis. | Jialin Lu, Shuhan Zhang, Fan Yang, Dian Zhou, Xuan Zeng |
| 2020 | ISCAS | Multi-Corner Parametric Yield Estimation via Bayesian Inference on Bernoulli Distribution with Conjugate Prior. | Jiahe Shi, Zhengqi Gao, Jun Tao, Yangfeng Su, Dian Zhou, Xuan Zeng |
| 2020 | ISCAS | Learning Low-Rank Structured Sparsity in Recurrent Neural Networks. | Weijing Wen, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng |
| 2019 | DAC | Faster Region-based Hotspot Detection. | Ran Chen, Wei Zhong, Haoyu Yang, Hao Geng, Xuan Zeng, Bei Yu |
| 2019 | DAC | Efficient Layout Hotspot Detection via Binarized Residual Neural Network. | Yiyang Jiang, Fan Yang, Hengliang Zhu, Bei Yu, Dian Zhou, Xuan Zeng |
| 2019 | DAC | An Efficient Multi-fidelity Bayesian Optimization Approach for Analog Circuit Synthesis. | Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng, Xiangdong Hu |
| 2019 | DATE | An Efficient FPGA-based Floating Random Walk Solver for Capacitance Extraction using SDAccel. | Xin Wei, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2019 | DATE | Bayesian Optimization Approach for Analog Circuit Synthesis Using Neural Network. | Shuhan Zhang, Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2019 | ICCAD | Efficient Performance Trade-off Modeling for Analog Circuit based on Bayesian Neural Network. | Zhengqi Gao, Jun Tao, Fan Yang, Yangfeng Su, Dian Zhou, Xuan Zeng |
| 2018 | DAC | Multi-objective bayesian optimization for analog/RF circuit synthesis. | Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2018 | DAC | A general graph based pessimism reduction framework for design optimization of timing closure. | Fulin Peng, Changhao Yan, Chunyang Feng, Jianquan Zheng, Sheng-Guo Wang, Dian Zhou, Xuan Zeng |
| 2018 | ICCAD | An efficient data reuse strategy for multi-pattern data access. | Wensong Li, Fan Yang, Hengliang Zhu, Xuan Zeng, Dian Zhou |
| 2018 | ICML | Batch Bayesian Optimization via Multi-objective Acquisition Ensemble for Automated Analog Circuit Design. | Wenlong Lyu, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2017 | ASPDAC | An efficient algorithm for stencil planning and optimization in E-beam lithography. | Jiabei Ge, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2017 | ASPDAC | Network flow based cut redistribution and insertion for advanced 1D layout design. | Ye Zhang, Wai-Shing Luk, Fan Yang, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2017 | DAC | Correlated Rare Failure Analysis via Asymptotic Probability Evaluation. | Jun Tao, Handi Yu, Dian Zhou, Yangfeng Su, Xuan Zeng, Xin Li |
| 2017 | DAC | Efficient Bayesian Yield Optimization Approach for Analog and SRAM Circuits. | Mengshuo Wang, Fan Yang, Changhao Yan, Xuan Zeng, Xiangdong Hu |
| 2017 | DATE | Subgradient based multiple-starting-point algorithm for non-smooth optimization of analog circuits. | Wenlong Lv, Fan Yang, Changhao Yan, Dian Zhou, Xuan Zeng |
| 2017 | DATE | An efficient leakage-aware thermal simulation approach for 3D-ICs using corrected linearized model and algebraic multigrid. | Chao Yan, Hengliang Zhu, Dian Zhou, Xuan Zeng |
| 2017 | ICCAD | Impact of circuit-level non-idealities on vision-based autonomous driving systems. | Handi Yu, Changhao Yan, Xuan Zeng, Xin Li |
| 2017 | ISCAS | Efficient SVM-based hotspot detection using spectral clustering. | Fan Yang, Charles C. Chiang, Xuan Zeng, Dian Zhou |
| 2017 | ISCAS | Layout decomposition for hybrid E-beam and DSA double patterning lithography. | Yunfeng Yang, Fan Yang, Wai-Shing Luk, Changhao Yan, Xuan Zeng, Xiangdong Hu |
| 2017 | ISCAS | A grid-based detailed routing algorithm for advanced 1D process. | Ye Zhang, Fan Yang, Dian Zhou, Xuan Zeng, Xiangdong Hu |
| 2017 | ISCAS | Efficient spectral graph sparsification via Krylov-subspace based spectral perturbation analysis. | Shuhan Zhang, Fan Yang, Xuan Zeng, Dian Zhou, Shun Li, Xiangdong Hu |
| 2017 | ISPA | A Novel N-Retry Transactional Memory Model for Multi-Thread Programming. | Kun Lu, Changhao Yan, Hai Zhou, Dian Zhou, Xuan Zeng |
| 2016 | ASPDAC | An efficient trajectory-based algorithm for model order reduction of nonlinear systems via localized projection and global interpolation. | Chenjie Yang, Fan Yang, Xuan Zeng, Dian Zhou |
| 2016 | DAC | Efficient performance modeling of analog integrated circuits via kernel density based sparse regression. | Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li |
| 2016 | DAC | Efficient performance modeling via Dual-Prior Bayesian Model Fusion for analog and mixed-signal circuits. | Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Dian Zhou, Xin Li |
| 2016 | DATE | Efficient spatial variation modeling via robust dictionary learning. | Changhai Liao, Jun Tao, Xuan Zeng, Yangfeng Su, Dian Zhou, Xin Li |
| 2016 | DATE | Efficient multiple starting point optimization for automated analog circuit optimization via recycling simulation data. | Bo Peng, Fan Yang, Changhao Yan, Xuan Zeng, Dian Zhou |
| 2016 | FPGA | Efficient Memory Partitioning for Parallel Data Access via Data Reuse. | Jincheng Su, Fan Yang, Xuan Zeng, Dian Zhou |
| 2016 | ICCAD | A novel unified dummy fill insertion framework with SQP-based optimization method. | Yudong Tao, Changhao Yan, Yibo Lin, Sheng-Guo Wang, David Z. Pan, Xuan Zeng |
| 2016 | ICCAD | Efficient statistical analysis for correlated rare failure events via asymptotic probability approximation. | Handi Yu, Jun Tao, Changhai Liao, Yangfeng Su, Dian Zhou, Xuan Zeng, Xin Li |
| 2016 | ISCAS | Fast compressive sensing reconstruction algorithm on FPGA using Orthogonal Matching Pursuit. | Zhelun Yu, Jincheng Su, Fan Yang, Yangfeng Su, Xuan Zeng, Dian Zhou, Weiping Shi |
| 2016 | ISCAS | High-speed link verification based on statistical inference. | Xuan Zeng, Chenlei Fang, Qicheng Huang, Fan Yang, Dian Zhou, Wei Cai, Weiping Shi |
| 2015 | ASPDAC | SIPredict: Efficient post-layout waveform prediction via System Identification. | Qicheng Huang, Xiao Li, Fan Yang, Xuan Zeng, Xin Li |
| 2015 | ASPDAC | Layout decomposition co-optimization for hybrid e-beam and multiple patterning lithography. | Yunfeng Yang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng, Dian Zhou |
| 2015 | ASPDAC | Machine learning and pattern matching in physical design. | Bei Yu, David Z. Pan, Tetsuaki Matsunawa, Xuan Zeng |
| 2015 | DAC | Efficient multivariate moment estimation via Bayesian model fusion for analog and mixed-signal circuits. | Qicheng Huang, Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li |
| 2015 | DATE | Efficient bit error rate estimation for high-speed link by Bayesian model fusion. | Chenlei Fang, Qicheng Huang, Fan Yang, Xuan Zeng, Xin Li, Chenjie Gu |
| 2014 | DAC | BMF-BD: Bayesian Model Fusion on Bernoulli Distribution for Efficient Yield Estimation of Integrated Circuits. | Chenlei Fang, Fan Yang, Xuan Zeng, Xin Li |
| 2014 | DATE | Recovery-based resilient latency-insensitive systems. | Yuankai Chen, Xuan Zeng, Hai Zhou |
| 2013 | ICCAD | Layout decomposition with pairwise coloring for multiple patterning lithography. | Ye Zhang, Wai-Shing Luk, Hai Zhou, Changhao Yan, Xuan Zeng |
| 2012 | DAC | Improved tangent space based distance metric for accurate lithographic hotspot classification. | Jing Guo, Fan Yang, Subarna Sinha, Charles C. Chiang, Xuan Zeng |
| 2012 | DAC | AMOR: an efficient aggregating based model order reduction method for many-terminal interconnect circuits. | Yangfeng Su, Fan Yang, Xuan Zeng |
| 2011 | ASPDAC | Low power discrete voltage assignment under clock skew scheduling. | Li Li, Jian Sun, Yinghai Lu, Hai Zhou, Xuan Zeng |
| 2011 | ASPDAC | Post-routing layer assignment for double patterning. | Jian Sun, Yinghai Lu, Hai Zhou, Xuan Zeng |
| 2011 | ASPDAC | Parallel cross-layer optimization of high-level synthesis and physical design. | James Williamson, Yinghai Lu, Li Shang, Hai Zhou, Xuan Zeng |
| 2011 | ASPDAC | A practical method for multi-domain clock skew optimization. | Yanling Zhi, Hai Zhou, Xuan Zeng |
| 2011 | DAC | An integrated algorithm for 3D-IC TSV assignment. | Xiaodong Liu, Yifan Zhang, Gary K. Yeap, Xuan Zeng |
| 2011 | DATE | An efficient algorithm for multi-domain clock skew scheduling. | Yanling Zhi, Wai-Shing Luk, Hai Zhou, Changhao Yan, Hengliang Zhu, Xuan Zeng |
| 2011 | ICCAD | A new method for multiparameter robust stability distribution analysis of linear analog circuits. | Changhao Yan, Sheng-Guo Wang, Xuan Zeng |
| 2010 | DAC | Global routing and track assignment for flip-chip designs. | Xiaodong Liu, Yifan Zhang, Gary K. Yeap, Chunlei Chu, Jian Sun, Xuan Zeng |
| 2010 | DATE | An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits. | Xiaoda Pan, Fan Yang, Xuan Zeng, Yangfeng Su |
| 2009 | ASPDAC | Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method. | Duo Li, Sheldon X.-D. Tan, Gengsheng Chen, Xuan Zeng |
| 2009 | DAC | Provably good and practically efficient algorithms for CMP dummy fill. | Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xuan Zeng |
| 2009 | DAC | Statistical reliability analysis under process variation and aging effects. | Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan Yang, Xuan Zeng |
| 2009 | DAC | Multicore parallel min-cost flow algorithm for CAD applications. | Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng |
| 2009 | ICCAD | Binning optimization based on SSTA for transparently-latched circuits. | Min Gong, Hai Zhou, Jun Tao, Xuan Zeng |
| 2009 | ISCAS | Incremental Circuit Simulation Analysis for Design Modification and Verification. | Tracey Y. Zhou, Dian Zhou, Xuan Zeng |
| 2008 | DAC | Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. | Yi Wang, Wai-Shing Luk, Xuan Zeng, Jun Tao, Changhao Yan, Jiarong Tong, Wei Cai, Jia Ni |
| 2007 | ASPDAC | Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic. | Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng |
| 2007 | ASPDAC | Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations. | Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles C. Chiang |
| 2007 | ASPDAC | WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. | Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng |
| 2007 | DATE | A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology. | Hengliang Zhu, Xuan Zeng, Wei Cai, Jintao Xue, Dian Zhou |
| 2007 | ICCAD | Parameterized model order reduction via a two-directional Arnoldi process. | Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng |
| 2007 | ISCAS | RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect. | Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou |
| 2006 | DATE | Time domain model order reduction by wavelet collocation method. | Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles C. Chiang |
| 2006 | ISCAS | A one-shot projection method for interconnects with process variations. | Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles C. Chiang |
| 2005 | ASPDAC | Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits. | Bang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles C. Chiang, Dian Zhou |
| 2005 | ASPDAC | A novel wavelet method for noise analysis of nonlinear circuits. | Xuan Zeng, Bang Liu, Jun Tao, Charles C. Chiang, Dian Zhou |
| 2005 | ISCAS | Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires. | Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng |
| 2004 | ASPDAC | Analog circuit behavioral modeling via wavelet collocation method with auto-companding. | Jian Wang, Jun Tao, Xuan Zeng, Charles C. Chiang, Dian Zhou |
| 2004 | DATE | Direct Nonlinear Order Reduction with Variational Analysis. | Lihong Feng, Xuan Zeng, Charles C. Chiang, Dian Zhou, Qiang Fang |
| 2004 | DATE | Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method. | Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles C. Chiang |
| 2004 | ICCAD | SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits. | Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles C. Chiang, Dian Zhou |
| 2004 | ISCAS | Two-sided projection method in variational equation model order reduction of nonlinear circuits. | Lihong Feng, Xuan Zeng, Jiarong Tong, Charles C. Chiang, Dian Zhou |
| 2004 | ISCAS | Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. | Jian Wang, Xuan Zeng, Wei Cai, Charles C. Chiang, Jiarong Tong, Dian Zhou |
| 2003 | ICCAD | Power-Optimal Simultaneous Buffer Insertion/Sizing and Wire Sizing. | Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng |
| 2003 | ISCAS | An efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method. | Xuan Zeng, Sheng Huang, Yangfeng Su, Dian Zhou |
| 2003 | ISCAS | An error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximation. | Xuan Zeng, Jun Tao, Yangfeng Su, Wenbing Chen, Dian Zhou |
| 2002 | ISCAS | Wavelet method for high-speed clock tree simulation. | Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling |
| 2001 | ICCAD | Behavioral Modeling of Analog Circuits by Wavelet Collocation Method. | Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling |
| 2001 | ISCAS | A wavelet balance approach for steady-state analysis of nonlinear circuits. | Xin Li, Bo Hu, Xieting Ling, Xuan Zeng |
| 2001 | ISCAS | Automatic clock tree design with IPs in the system. | Wei Li, Dian Zhou, Haksu Kim, Xuan Zeng |
| 2000 | ISCAS | Parasitic and mismatch modeling for optimal stack generation [in CMOS]. | Xuan Zeng, Mingyuan Li, Wenqing Zhao, Pushan Tang, Dian Zhou |
| 1999 | ISCAS | A constraint-based placement refinement method for CMOS analog cell layout. | Xuan Zeng, J. Guan, Wenqing Zhao, Pushan Tang, Dian Zhou |