| 2024 | IJCAI | Safety Constrained Multi-Agent Reinforcement Learning for Active Voltage Control. | Yang Qu, Jinming Ma, Feng Wu |
| 2022 | PIMRC | Angular Information Extraction Algorithm of 5G-NR Uplink Wireless Channel Based on SRS. | Yuan Li, Yang Zhang, Yang Qu, Lihua Pang, Qi Yan, Xin Li, Jiandong Li |
| 2021 | ICRA | Positioning Control for Underactuated Unmanned Surface Vehicles to Resist Environmental Disturbances. | Yang Qu, Lilong Cai |
| 2021 | IJCNN | The Option Pricing Model Based on Time Values: An Application of the Universal Approximation Theory on Unbounded Domains. | Yang Qu, Ming-Xi Wang |
| 2009 | PACLIC | Collaborative Summarization: When Collaborative Filtering Meets Document Summarization. | Yang Qu, Qunxiu Chen |
| 2008 | DATE | Improving the Efficiency of Run Time Reconfigurable Devices by Configuration Locking. | Yang Qu, Juha-Pekka Soininen, Jari Nurmi |
| 2008 | FDL | Application - Platform Performance Modeling and Evaluation. | Jari Kreku, Mika Hoppari, Tuomo Kestil, Yang Qu, Juha-Pekka Soininen, Kari Tiensyrj |
| 2008 | FDL | Application Workload and SystemC Platform Modeling for Performance Evaluation. | Jari Kreku, Mika Hoppari, Tuomo Kestil, Yang Qu, Juha-Pekka Soininen, Kari Tiensyrj |
| 2008 | INFOCOM | Inside the New Coolstreaming: Principles, Measurements and Performance Implications. | Bo Li, Susu Xie, Yang Qu, Gabriel Yik Keung, Chuang Lin, Jiangchuan Liu, Xinyan Zhang |
| 2007 | DATE | Interactive presentation: Using dynamic voltage scaling to reduce the configuration energy of run time reconfigurable devices. | Yang Qu, Juha-Pekka Soininen, Jari Nurmi |
| 2007 | ISCAS | A Genetic Algorithm for Scheduling Tasks onto Dynamically Reconfigurable Hardware. | Yang Qu, Juha-Pekka Soininen, Jari Nurmi |
| 2007 | ISCAS | System-Level Design for Partially Reconfigurable Hardware. | Yang Qu, Kari Tiensyrj, Juha-Pekka Soininen, Jari Nurmi |
| 2006 | DATE | A parallel configuration model for reducing the run-time reconfiguration overhead. | Yang Qu, Juha-Pekka Soininen, Jari Nurmi |
| 2006 | FDL | Layered UML Workload and SystemC Platform Models. | Jari Kreku, Yang Qu, Juha-Pekka Soininen, Kari Tiensyrj |
| 2006 | FPL | System Level Architecture Exploration for Reconfigurable Systems On Chip. | Konstantinos Masselos, Kari Tiensyrj, Yang Qu, Nikolaos S. Voros, Miroslav Cupk, Luc Rijnders, Marko Pettissalo |
| 2005 | DSD | SystemC-based Design Methodology for Reconfigurable System-on-Chip. | Yang Qu, Kari Tiensyrj, Juha-Pekka Soininen |
| 2005 | FPL | An Efficient Approach to Hide the Run-Time Reconfiguration from SW Applications. | Yang Qu, Juha-Pekka Soininen, Jari Nurmi |
| 2004 | FPL | System-Level Modeling of Dynamically Reconfigurable Co-processors. | Yang Qu, Kari Tiensyrj, Kostas Masselos |
| 2003 | DSD | Estimating the Utilization of Embedded FPGA Co-Processor. | Yang Qu, Juha-Pekka Soininen |
| 2002 | DATE | Mappability Estimation of Architecture and Algorithm. | Juha-Pekka Soininen, Jari Kreku, Yang Qu |