| 2015 | ASPDAC | Analytical placement for rectilinear blocks. | Yasuhiro Takashima |
| 2010 | ISCAS | Delay analysis of sub-path on fabricated chips by several path-delay tests. | Takanobu Shiki, Yasuhiro Takashima, Yuichi Nakamura |
| 2009 | FPL | Globally optimal time-multiplexing in inter-FPGA connections for accelerating multi-FPGA systems. | Masato Inagi, Yasuhiro Takashima, Yuichi Nakamura |
| 2008 | ISCAS | ILP-based optimization of time-multiplexed I/O assignment for multi-FPGA systems. | Masato Inagi, Yasuhiro Takashima, Yuichi Nakamura, Atsushi Takahashi |
| 2007 | ASPDAC | A Theoretical Study on Wire Length Estimation Algorithms for Placement with Opaque Blocks. | Tan Yan, Shuting Li, Yasuhiro Takashima, Hiroshi Murata |
| 2004 | ASPDAC | Abstraction and optimization of consistent floorplanning with pillar block constraints. | Ning Fu, Shigetoshi Nakatake, Yasuhiro Takashima, Yoji Kajitani |
| 2004 | ASPDAC | Multi-level placement with circuit schema based clustering in analog IC layouts. | Takashi Nojima, Xiaoke Zhu, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani |
| 2004 | ISCAS | A fast algorithm for crosspoint assignment under crosstalk constraints with shielding effects. | Keiji Kida, Xiaoke Zhu, Changwen Zhuang, Yasuhiro Takashima, Shigetoshi Nakatake |
| 2000 | ASPDAC | Self-reforming routing for stochastic search in VLSI interconnection layout. | Yukiko Kubo, Yasuhiro Takashima, Shigetoshi Nakatake, Yoji Kajitani |
| 1996 | DATE | Detailed-Routability of FPGAs with Extremal Switch-Block Structures. | Yasuhiro Takashima, Atsushi Takahashi, Yoji Kajitani |