Yasumasa Tsukamoto
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2005–2011
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2011 | ISLPED | A dynamic body-biased SRAM with asymmetric halo implant MOSFETs. | Makoto Yabuuchi, Yasumasa Tsukamoto, Hidehiro Fujiwara, Shigeki Tawa, Koji Maekawa, Motoshige Igarashi, Koji Nii |
| 2005 | ICCAD | Worst-case analysis to obtain stable read/write DC margin of high density 6T-SRAM-array with local Vth variability. | Yasumasa Tsukamoto, Koji Nii, Susumu Imaoka, Yuji Oda, Shigeki Ohbayashi, Tomoaki Yoshizawa, Hiroshi Makino, Koichiro Ishibashi, Hirofumi Shinohara |
| 2005 | ISCAS | A 3224-bit multiplier-accumulator with advanced rectangular styled Wallace-tree structure. | Niichi Itoh, Yasumasa Tsukamoto, Takeshi Shibagaki, Koji Nii, Hidehiro Takata, Hiroshi Makino |