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Young Hoon Son

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

9

Venues

5

Active years

2013–2021

Best venue rank

A*

Where they publish

Papers

9 indexed papers, newest first.

YearVenueTitleAuthors
2021MICROGreenDIMM: OS-assisted DRAM Power Management for DRAM with a Sub-array Granularity Power-Down State.Seunghak Lee, Ki-Dong Kang, Hwanjun Lee, Hyungwon Park, Young Hoon Son, Nam Sung Kim, Daehoon Kim
2017HPCADefect Analysis and Cost-Effective Resilience Architecture for Future DRAM Devices.Sang-uhn Cha, Seongil O, Hyunsung Shin, Sangjoon Hwang, Kwang-Il Park, Seong-Jin Jang, Joo-Sun Choi, Gyo-Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho Ahn, Nam Sung Kim
2017HPCASOUP-N-SALAD: Allocation-Oblivious Access Latency Reduction with Asymmetric DRAM Microarchitectures.Yuhwan Ro, Hyunyoon Cho, Eojin Lee, Daejin Jung, Young Hoon Son, Jung Ho Ahn, Jae W. Lee
2016MICROChameleon: Versatile and practical near-DRAM acceleration architecture for large memory systems.Hadi Asghari Moghaddam, Young Hoon Son, Jung Ho Ahn, Nam Sung Kim
2015HPCACiDRA: A cache-inspired DRAM resilience architecture.Young Hoon Son, Sukhan Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, Jung Ho Ahn
2014ISCARow-buffer decoupling: A case for low-latency DRAM microarchitecture.Seongil O, Young Hoon Son, Nam Sung Kim, Jung Ho Ahn
2014SCMicrobank: Architecting Through-Silicon Interposer-Based Main Memory Systems.Young Hoon Son, Seongil O, Hyunggyun Yang, Daejin Jung, Jung Ho Ahn, John Kim, Jangwoo Kim, Jae W. Lee
2013ICCADDynamic bandwidth scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os.Daniel W. Chang, Young Hoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael J. Schulte, Nam Sung Kim
2013ISCAReducing memory access latency with asymmetric DRAM bank organizations.Young Hoon Son, Seongil O, Yuhwan Ro, Jae W. Lee, Jung Ho Ahn