Yu-Chung Lin
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
4
Venues
3
Active years
2000–2002
Best venue rank
C
Where they publish
Papers
4 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2002 | DATE | A New Formulation for SOC Floorplan Area Minimization Problem. | Chih-Hung Lee, Yu-Chung Lin, Wen-Yu Fu, Chung-Chiao Chang, Tsai-Ming Hsieh |
| 2001 | ISCAS | Low power driven re-synthesis algorithm for heterogeneous FPGA under delay constraint. | Po-Xun Chiu, Yu-Chung Lin, Yi-Ling Hsieh, Tsai-Ming Hsieh |
| 2000 | FPGA | Cost minimization of partitioned circuits with complex resource constraints in FPGAs (poster abstract). | Yu-Chung Lin, Su-Feng Tseng, Tsai-Ming Hsieh |
| 2000 | ISCAS | Minimum crosstalk channel routing with dogleg. | Kuo-Chih Hsu, Yu-Chung Lin, Po-Xun Chiu, Tsai-Ming Hsieh |