| 2015 | FPGA | Sequence-based In-Circuit Breakpoints for Post-Silicon Debug (Abstract Only). | Yutaka Tamiya, Yoshinori Tomita, Toshiyuki Ichiba, Kaoru Kawamura |
| 2015 | FPL | Data-triggered breakpoint for in-circuit debug without re-implementation. | Yutaka Tamiya, Yoshinori Tomita, Toshiyuki Ichiba, Kaoru Kawamura |
| 2012 | DATE | Fast cycle estimation methodology for instruction-level emulator. | David Thach, Yutaka Tamiya, Shinya Kuwamura, Atsushi Ike |
| 1999 | ICCAD | Performance optimization using separator sets. | Yutaka Tamiya |
| 1997 | ASPDAC | Delay estimation for technology independent synthesis. | Yutaka Tamiya |
| 1994 | ICCAD | LP based cell selection with constraints of timing, area, and power consumption. | Yutaka Tamiya, Yusuke Matsunaga, Masahiro Fujita |
| 1991 | ICCAD | Application of Boolean Unification to Combinational Logic Synthesis. | Masahiro Fujita, Yutaka Tamiya, Yuji Kukimoto, Kuang-Chien Chen |
| 1990 | ICPR | A multiprocessor system for multiple image recognition-application to automatic routing system. | Gotaro Odawara, Masahiro Tomita, Honghai Jiang, Yutaka Tamiya, Taisei Yoshino, Yoshihiro Hayashi, Satoru Maruyama, Guixin Cheng, Hidetoshi Sakaki |
| 1988 | ICPR | An integrated visual system for solder inspection. | Gotaro Odawara, Tsutomu Kurokawa, Yutaka Tamiya, Tatsuya Fujii |