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Yves Blaquire

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

20

Venues

4

Active years

1998–2024

Best venue rank

C

Where they publish

Papers

20 indexed papers, newest first.

YearVenueTitleAuthors
2024ISCASA Precise and Reliable Engine Knock Detection Utilizing Meta Classifier.Amirhossein Moshrefi, Yves Blaquire, Frederic Nabki
2024ISCASConfigurable and Intelligent Switched CMOS Current Driver Powering Arrays of Electrothermal Actuators for MEMS Switches.Allan Riboullet, Frdric Nabki, Yves Blaquire, Glenn E. R. Cowan
2021ISCASSHEPWM Class-D Amplifier with a Reconfigurable Gate Driver Integrated Circuit.Nueraimaiti Aimaier, Nam Ly, Gabriel Nobert, Yves Blaquire, Nicolas G. Constantin, Glenn E. R. Cowan
2021ISCASAcceleration of the Secure Hash Algorithm-256 (SHA-256) on an FPGA-CPU Cluster Using OpenCL.Hachem Bensalem, Yves Blaquire, Yvon Savaria
2021ISCASA Novel Minimum-Phase Dual-Inductor Hybrid Boost Converter with PWM Voltage-Mode Controller.Van Ha Nguyen, Abdul Hafiz Alameh, Nam Ly, Yves Blaquire, Glenn E. R. Cowan
2021ISCASCompact and Low-Power Under-Voltage Lockout and Thermal-Shutdown Protection Circuits Using a Novel Low-Iq All-in-One Bandgap Comparator.Van Ha Nguyen, Nam Ly, Abdul Hafiz Alameh, Yves Blaquire, Glenn E. R. Cowan
2021ISCASTowards an LTCC SiP for Control System in Safety-Critical Applications.Gabriel Nobert, Abdul Hafiz Alameh, Nam Ly, Nicolas G. Constantin, Yves Blaquire
2019ISCASToward In-System Monitoring of OpenCL-Based Designs on FPGA.Hachem Bensalem, Yves Blaquire, Yvon Savaria
2017ISCASA multi-measurements RO-TDC implemented in a Xilinx field programmable gate array.Safa Berrima, Yves Blaquire, Yvon Savaria
2016ISCASA compact spatially configurable differential input stage for a field programmable interconnection network.Wasim Hussain, Yvon Savaria, Yves Blaquire
2015IOLTSDefect diagnosis algorithms for a field programmable interconnect network embedded in a Very Large Area Integrated Circuit.Gontran Sion, Yves Blaquire, Yvon Savaria
2015IOLTSOptimization of SEU emulation on SRAM FPGAs based on sensitiveness analysis.Anis Souari, Claude Thibeault, Yves Blaquire, Raoul Velazco
2014ISCASDesign and validation of a novel reconfigurable and defect tolerant JTAG scan chain.Yves Blaquire, Yan Basile-Bellavance, Safa Berrima, Yvon Savaria
2013ISCASAn interface for the IWasim Hussain, Yvon Savaria, Yves Blaquire
2012ISCASPropagating analog signals through a fully digital network on an electronic system prototyping platform.Omar Al-Terkawi Hasib, Walder Andre, Yves Blaquire, Yvon Savaria
2012RSPA new approach for pin detection for an electronic system prototyping reconfigurable platform.Hai H. Nguyen, Mikael Guillemot, Yvon Savaria, Yves Blaquire
2011ISCASMachine-learning framework for automatic netlist creation.Mohamed Badreddine, Yves Blaquire, Mounir Boukadoum
2009ISCASWorkflow for an Electronic Configurable Prototyping System.Etienne Lepercq, Yves Blaquire, Richard Norman, Yvon Savaria
2000ISCASAnalysis of quantization effects in a digital hardware implementation of a fuzzy ART neural network algorithm.Marc-Andr Cantin, Yves Blaquire, Yvon Savaria, Pierre Lavoie, Eric Granger
1998FCCMA Comparative Analysis of Fuzzy ART Neural Network Implementations: The Advantages of Reconfigurable Computing.Pascal Poir, Marc-Andr Cantin, Herv Daniel, Yves Blaquire, Yvon Savaria