Zeyad Aklah
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
3
Venues
3
Active years
2015–2016
Best venue rank
A
Where they publish
Papers
3 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2016 | DATE | Run time interpretation for creating custom accelerators. | Sen Ma, Zeyad Aklah, David Andrews |
| 2016 | FPGA | Just In Time Assembly of Accelerators. | Sen Ma, Zeyad Aklah, David Andrews |
| 2015 | FPL | A run time interpretation approach for creating custom accelerators. | Sen Ma, Zeyad Aklah, David Andrews |