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Formal Methods in Computer-Aided Design

FMCAD

B

CORE rank

CORE rank (raw)

B

Fields of research

Software Engineering

Papers indexed

840

1996–2025

Papers per year

199645 peak2025

FMCAD papers

840 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2009Interpolation-sequence based model checking.Yakir Vizel, Orna Grumberg
2009A verified platform for a gate-level electronic control unit.Sergey Tverdyshev
2009Safety first: A two-stage algorithm for LTL games.Saqib Sohail, Fabio Somenzi
2009MCC: A runtime verification tool for MCAPI user applications.Subodh Sharma, Ganesh Gopalakrishnan, Eric Mercer, Jim Holt
2009Connecting pre-silicon and post-silicon verification.Sandip Ray, Warren A. Hunt Jr.
2009Protocol verification using flows: An industrial experience.John W. O'Leary, Murali Talupur, Mark R. Tuttle
2009Generalized, efficient array decision procedures.Leonardo Mendona de Moura, Nikolaj S. Bjrner
2009Debugging formal specifications using simple counterstrategies.Robert Knighofer, Georg Hofferek, Roderick Bloem
2009Verifying equivalence of memories using a first order logic theorem prover.Zurab Khasidashvili, Mahmoud Kinanah, Andrei Voronkov
2009A compositional theory for post-reboot observational equivalence checking of hardware.Zurab Khasidashvili, Daher Kaiss, Doron Bustan
2009Assume-guarantee validation for STE properties within an SVA environment.Zurab Khasidashvili, Gavriel Gavrielov, Tom Melham
2009Scaling VLSI design debugging with interpolation.Brian Keng, Andreas G. Veneris
2009Formal verification of correctness and performance of random priority-based arbiters.Krishnan Kailas, Viresh Paruthi, Brian Monwai
2009Efficient decision procedure for non-linear arithmetic constraints using CORDIC.Malay K. Ganai, Franjo Ivancic
2009Hardware/software co-verification of cryptographic algorithms using Cryptol.Levent Erkk, Magnus Carlsson, Adam Wick
2009Verification of recursive methods on tree-like data structures.Jyotirmoy V. Deshmukh, E. Allen Emerson
2009Formal verification of analog designs using MetiTarski.William Denman, Behzad Akbarpour, Sofine Tahar, Mohamed H. Zaki, Lawrence C. Paulson
2009Finding heap-bounds for hardware synthesis.Byron Cook, Ashutosh Gupta, Stephen Magill, Andrey Rybalchenko, Jir Simsa, Satnam Singh, Viktor Vafeiadis
2009Structure-aware computation of predicate abstraction.Alessandro Cimatti, Jori Dubrovin, Tommi A. Junttila, Marco Roveri
2009Decision diagrams for linear arithmetic.Sagar Chaki, Arie Gurfinkel, Ofer Strichman
2009Enhanced verification by temporal decomposition.Michael L. Case, Hari Mony, Jason Baumgartner, Robert Kanzelman
2009Towards a formally verified network-on-chip.Tom van den Broek, Julien Schmaltz
2009Mixed abstractions for floating-point arithmetic.Angelo Brillout, Daniel Kroening, Thomas Wahl
2009Synthesizing robust systems.Roderick Bloem, Karin Greimel, Thomas A. Henzinger, Barbara Jobstmann
2009Industrial strength refinement checking.Jesse D. Bingham, John Erickson, Gaurav Singh, Flemming Andersen
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