| 2026 | Binary Descriptor Learning via Diffusion-based Feature Disentanglement. | Shunan Mao, Gang Shen, Xuefei Lv, Ziwei Liu, Shiliang Zhang |
| 2026 | MOTA: Mapping and Optimization of ASIC-Accelerated TFHE Transciphering. | Ran Mao, Zhenyu Guan, Song Bian |
| 2026 | Adaptive AV2 In-loop Filtering via Guided Neural Model with Vectorized Quantization. | Kequan Mao, Dandan Ding, Urvang Joshi, Debargha Mukherjee |
| 2026 | CVA6-CFI: A First Glance at RISC-V Control-Flow Integrity Extensions. | Simone Manoni, Emanuele Parisi, Riccardo Tedeschi, Davide Rossi, Andrea Acquaviva, Andrea Bartolini |
| 2026 | QT-PUF: Quantum Tunneling Leakage Based PUF for Implantable IoMT Devices. | Yueqi Ma, Vivek Mohan, Chip Hong Chang, Emmanuel M. Drakakis |
| 2026 | DocIQ: A Benchmark Dataset and Feature Fusion Network for Document Image Quality Assessment. | Zhichao Ma, Fan Huang, Lu Zhao, Fengjun Guo, Guangtao Zhai, Xiongkuo Min |
| 2026 | CoMe3D: Co-Optimizing Cache-Memory Coupling and Traffic Scheduling for Monolithic 3D Heterogeneous Systems. | Jingpeng Ma, Ke Han, Mingxuan Wu, Rongrong Fu, Min Luo, Kuihan Zhou |
| 2026 | Design-Driven Exploration of MOM Capacitors for Capacitive Neural Networks. | Sachin Maheshwari, Himadri Singh Raghav, Mike Smart, Themis Prodromakis, Alexander Serb |
| 2026 | An Efficient Hardware Accelerator for JPEG-AI Image Compression on FPGA. | Weize Ma, Sen Gao, Siyuan Leng, Tong Chen, Ming Lu, Zhan Ma, Jun Lin |
| 2026 | VFE-CIM: An Algorithm-Hardware Co-Designed Computing-in-Memory Accelerator for Efficient Voxel Feature Encoding in Large-Scale Point Clouds. | Yuang Ma, Shiyu Fan, Ziwei Li, Song Chen, Yi Kang |
| 2026 | Energy-Efficient Neural Video Coding via a High-Throughput Hardware Design for Pointwise Convolution and LUT-based WSiLU. | Denis Maass, Vanessa Aldrighi, Ruhan A. Conceio, Wen-Hsiao Peng, Luciano Agostini, Marcelo Schiavon Porto |
| 2026 | Robust Multichannel Autoregressive Parameter Estimation in Spatially Correlated and Impulsive Noise. | Mingxi Lyu, S. C. Chan |
| 2026 | A Low Noise Bio-potential AFE Achieving 300-mV EDO Tolerance and <20-ms-Settling with VCO-based Full Digital DC Servo Loop. | Shengping Lv, Guanzhe Hu, Liuxin Lv, Peng Zhang, Fei Chen, Wen Jia, Shuqiang Lu, Zhihua Wang, Hanjun Jiang |
| 2026 | Near-field Radar Imaging Acceleration Strategy Using Wavelet Transform and Multiscale Processing. | Tianxing Lu, Yang Zhao, Yingjian Hao, Jingqian Wang, Leilei Huang, Chunqi Shi, Jinghong Chen, Runxi Zhang |
| 2026 | Diff-Band:Bandwidth Estimation in RTC via Diffusion-Based Offline Reinforcement Learning. | Bingcong Lu, Jun Xu, Zhengxue Cheng, Li Song, Bingnan Duan, Jintao Fang |
| 2026 | A Broadband Ultra-Compact Series Doherty Power Amplifier Achieving Back-Off Efficiency Enhancement over 24-to-38GHz in 65nm Bulk CMOS. | Hanyu Lu, Pei Qin, Quan Xue, Weijie Chen |
| 2026 | A Hybrid CTDT ΔΣ Direct-Digitization Analog Front-End with SAR Quantizer Reuse Zin Boosting. | Fan Luo, Wenjie Wang, Zhengtao Zhu, Longbin Zhu, Zhijun Zhou, Keping Wang |
| 2026 | A 64GS/s 8b 64 Time-Interleaved SAR ADC Achieving 33.8dB SNDR at 26GHz in 28nm CMOS. | Yixiao Luo, Jiacheng Wang, Jun Chang, Hongzhi Liang, Li Dang, Ruixue Ding, Shubin Liu, Zhangming Zhu |
| 2026 | A Dual-Loop Multiphase DLL with Charge-Pump-Based Duty Cycle and Phase Error Corrector. | Jie Luo, Jiatong Sun, Yetong Wang, Kaixue Ma, Keping Wang |
| 2026 | A Highly Linear SAR ADC Architecture with a Correction-Free Hybrid DAC. | Yanquan Luo, Nan Sun |
| 2026 | A 4.7 μW Dual-Phase Front End with Dual-Mode Buffer for Dry-Electrode ECG Acquisition. | Ao Luo, Zhechang Hu, Pujia Xing, Lei Qian, Liang Qi, Yan Liu |
| 2026 | Audio-Visual Synergy for High-Fidelity Portrait Animation: A Two-Stage Framework with Identity-Motion Disentanglement. | Yuzhi Lu, Yuanzong Mei, Wenyi Wang, Xi Chen, Xiaowen Chen, Zhi Wang, Feng Xu, Jianwen Chen |
| 2026 | A Highly Linear 5-Level SCDAC with Simple Control Logic for Wideband CTDSMs. | Tong Lu, Jiarui Dong, Xian Tang |
| 2026 | Live Demonstration: An Agile FPGA-Overlayed CGRA SoC for High-Efficiency Computing. | Jiahang Lou, Jianrong Zhang, Yuan Dai, Zewei Zhong, Huan Lin, Wenbo Yin, Lingli Wang |
| 2026 | RASLL: A Removal Attack on SAT-Resistant Logic Locking. | Zijian Long, Juncheng Chen, Han Zhang, Tong Lin, Nay Aung Kyaw, Bah-Hwee Gwee |