| 2026 | A 0.58 Ops/Trans Analog Compute-in-Memory Macro with Input Operand Generator Supporting Wide Boolean Operations for Enhanced Versatility. | Eun-Bi Koh, Jeong-Eun Ko, Joo-Hyung Chae |
| 2026 | Open and Accessible Workflows for the education and Prototyping of Nanoelectronic Devices. | Georgios Kleitsiotis, Pantelis Fraidakis, Emmanouil Stavroulakis, Iosif-Angelos Fyrigos, Ioannis Vourkas, Malgorzata Chrzanowska-Jeske, J.-W. Kim, Georgios Ch. Sirakoulis |
| 2026 | An Isomorphic Transformation for Hardware Implemented Non-negative Neural Networks. | Manos Kirtas, Nikolaos Passalis, Nikos Pleros, Anastasios Tefas |
| 2026 | Energy Function Choice for Training Nonlinear Resistive Neural Networks with Equilibrium Propagation. | Fatma Zll Kiraz, Dang-Kin Germain Pham, Patricia Desgreys |
| 2026 | An 80 Gbit/s NRZ 100 Gbit/s PAM4 Highly-Efficient Voltage-Mode VCSEL-Driver in 22nm FDSOI CMOS. | Nikolaos Kioulos, Urs Hecht, Helia Ordouei, Nikolay N. Ledentsov, Sebastian Linnhoff, Si-Cong Tian, Friedel Gerfers |
| 2026 | A Scalable Dual-Input/Output Heap-Based Top-K Unit for Vector Search Accelerators. | Ji Soo Kim, Hannah Yang, Sujin Kim, Ji-Hoon Kim |
| 2026 | Memory-Efficient Partially Self-Corrected Min-Sum LDPC Decoder for 5G NR Applications. | Seungjun Kim, Sangbu Yun, Jeongwon Choe, Youngjoo Lee |
| 2026 | A16K: 1.6nm NSFET, FSFET, and CFET Technology Libraries for Chip-Level VLSI Prediction. | Hwiryong Kim, Hanmok Park, Mingyun Sun, Yongjin Kwon, Jiyoon Jung, Gahyeon Kim, Gyeongjin Kim, Sein Kang, Sunmean Kim, Taigon Song |
| 2026 | BRAM-Free ML-KEM NTT with SRL-Based Reordering Unit. | Gijung Kim, Yongmin Park, Chae-Eun Rhee |
| 2026 | Design of Switch-Free Bias-Current-Free ∆Σ Fractional-N PLLs with Calibration-Free Quantization Noise Reduction. | Ho Won Kim, Hong Geun Park, Kang Yoon Lee, Woogeun Rhee |
| 2026 | Low-Latency Software-Defined 5G NR PUSCH Receiver with Mixed-Precision SIMD Acceleration. | Jaehee Kim, Chanhee Lee, Jaewha Kim, Nam-Il Kim, Youngjoo Lee |
| 2026 | A 26 Gb/s/pin Single-Ended Transceiver With Adaptive Switched-Capacitor-Based Simultaneous Switching Noise Compensation. | Namhoon Kim, Heesang Kim, Wonbin Lee, Junghoo Kim, Sara Kim, Jaeseung Jeong, Kyeongha Kwon |
| 2026 | A 20 Gb/s All-Digital CDR with Fast Locking and Improved PI Linearity Using an Injection-Locked Ring Oscillator. | Jimin Kim, Taeuk Kim, Jinwook Burm |
| 2026 | MEGA.mini-S: A 1.9-to-15.0 TOPS/W Generative AI Processor with Bit-serial Weight Scalability and Bank-Conflict-free Sparsity Compression. | Taesu Kim, Donghyeon Han |
| 2026 | Circuit Similarity Based Initial Parameter Sampling for Tool Parameter Exploration. | Yebin Kim, Jinil An, Daijoon Hyun |
| 2026 | Privacy-Preserving Machine Learning Accelerators: Balancing Efficiency and Security. | Bokyung Kim |
| 2026 | CryHop: Baby Cry Classification on Dunstan Dataset using Transfer Learning and Ensembling. | Soheil Khooyooz, Loic Ricard, Jiayue Liu, Mostafa Haghi, Nima TaheriNejad |
| 2026 | A Novel Segmentation Approach Based on Analog LSB for High-Resolution mmWave Digital TXs. | Niek Kesteloo, Lennart Detje, Vojkan Vidojkovic, Dusan M. Milosevic, Georgi I. Radulov |
| 2026 | A 5V swing, 20GS/s, 6-bit Current Steering DAC utilizing LDMOS in 22nm FDSOI CMOS. | Jendrik Kellermann, Urs Hecht, Philipp Nickel, Friedel Gerfers |
| 2026 | DirectGeMM: Eliminating the GeMV Bottleneck in Analog In-Memory Computing. | Tomohisa Kawakami, Tergel Molom-Ochir, Xudong Zhuang, Jiahui Yang, Tania Roy, Hai Li, Yiran Chen |
| 2026 | A 30.4 dB Dynamic Range Pulse-Modulated Class-E RF PA with 11-bit Digital Pulse Modulation Unit Achieving 25.3 dBm Psat and 32.3% Peak PAE. | Merkourios Katsimpris, Thomas Burger, Hua Wang |
| 2026 | Dynamic GNNs for Continual Learning on Circuits. | Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu |
| 2026 | Educational Perspectives on LLM Architectures: Analyzing Code Generation for Circuits and Systems. | Rupesh Raj Karn, Johann Knechtel, Ozgur Sinanoglu |
| 2026 | A High-Performance and Area-Efficient Unified Butterfly Module for ML-KEM Polynomial Computations. | Chun-Jui Kang, Wai-Chi Fang |
| 2026 | A 41-62.4 GHz CMOS Frequency Doubler with Peak 30.79% Drain and 13.7% Total Efficiency. | Harikrishna Kambham, Praful Mankar |