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IEEE International Symposium on Circuits and Systems

ISCAS

C

CORE rank

CORE rank (raw)

C

Fields of research

Computer Systems Engineering

Papers indexed

27,938

1993–2026

Papers per year

19931,581 peak2026

ISCAS papers

27,938 records sourced from DBLP. Search titles, filter by year, sort by recency.

YearTitleAuthors
2025Detection of Physiological Data Tampering Attacks with Quantum Machine Learning.Md. Saif Hassan Onim, Himanshu Thapliyal
2025Towards Battery-Less Internet of Bodies: Energy Harvester with Reconfigurable Stages Enabled by Galvanic Body-Coupled Powering for Bio-Implants.Asif Iftekhar Omi, Adrija Mukherjee, Anyu Jiang, Baibhab Chatterjee
2025Communication in Brain Circuits and Systems: a Primer.Vladimir Omelyusik, Lily Gebhart, Satish S. Nair
2025Partitioning SFQ Circuits for Serial Biasing in Heterogeneous Circuits.Tejumadejesu Oluwadamilare, Eby G. Friedman
2025A 9.6 TOPS/W Vision Transformer Processor with Hierarchical Token Merging for Similarity-Driven Difference Computing.Jungjun Oh, Sangjin Kim, Jiwon Choi, Byeongcheol Kim, Hoi-Jun Yoo
2025A Stacked MOSFET-Based RF Switch with Inductive Biasing Network.Oguzhan Oezdamar, Valentyn Solomko
2025Accelerating Machine Learning with RISC-V Vector Extension and Auto-Vectorization Techniques.Willian Analdo Nunes, Antnio Vinicius Corra Dos Santos, Fernando Gehm Moraes
2025Functionalized ImmunoFET for Detection of Phosphatidyl-L-serine.Utku Noyan, Sahil Shah, Pamela Abshire
2025A SHA-Less Front-end Stage Structure Suitable for Time-Interleaved Pipeline ADC.Meng Ni, Peng Wang, Fule Li, Hanjun Jiang, Zhihua Wang
2025Efficient Real-Time Fine-Grained Action Recognition over a Progressive and Hierarchical Classification Framework.Shuwen Niu, Junkun Jiang, Jie Chen
2025Digital Twin-Based Architecture for Run-Time Power Modeling for Sensorless Edge Devices.Parveen Nisha, Ratnala Vinay, Kartik Laad, Amit Acharyya
2025Optimizing Sparse/Dense VEGETA Accelerator Performance with Microscaling Quantization.Kazi Barria Nine, Connor Talley, Ajay Sharma Mandadi, Tushar Krishna, Arijit Raychowdhury
2025AI-Based Optimization of a DC-DC Buck Converter Control Network Across DCM and CCM Operating Region.Lorenzo Nikiforos, Giuseppe Gabriele, Francesco Gabriele, Luciano Prono, Fabio Pareschi, Riccardo Rovatti, Gianluca Setti
2025Live Demonstration: Sea Wave Energy Harvester for Environmental Monitoring Buoys.Filippo Nicora, Orazio Aiello, Corrado Boragno, Daniele D. Caviglia, Alessandro Lo Schiavo
2025HyperGS: Efficient Real-Time 3D Gaussian Rendering Processor Through Hierarchical Sorting.Cheng Nian, Xiaorui Mo, Jiaying Peng, Weiyi Zhang, Fasih Ud Din Farrukh, Fei Chen, Chun Zhang
2025Analog Linearization of VCO-based ADCs with Machine-Learning-Assisted Co-Design.Viet Nguyen, Robert Bogdan Staszewski
2025Closed-Loop Neuromorphic Deep Brain Stimulation using Deep Spiking Q-Networks.Binh Nguyen, Edward Mighetto, Dylan Louie, Chunxiu Yu, Jason Eshraghian
2025Live Demonstration: ASIC Implementation of ASCON Lightweight Cryptography for IoT Applications.Khai-Duy Nguyen, Tuan-Kiet Dang, Binh Kieu-Do-Nguyen, Cong-Kha Pham, Trong-Thuc Hoang
2025A Low-Latency Polynomial Arithmetic Unit for ML-KEM and ML-DSA Standards.Trong-Hung Nguyen, Duc-Thuan Dam, Phuc-Phan Duong, Trong-Thuc Hoang, Cong-Kha Pham
2025Extended Operational Life for Wearable Health Devices: A Hybrid TinyML and Server-Side ML Approach.Najmeh Nazari, Vedant Patel, Chongzhou Fang, Setareh Rafatirad, Houman Homayoun
2025Analysis and Design of Broadband Transitions from Microstrip-to-CV-WSIW for mm-Wave Applications.Anil Kumar Nayak, Igor M. Filanovsky, Kambiz Moez, Amalendu Patnaik
2025Broadband Tapered Microstrip Line-to-SIW Transition for C/X-Band Applications.Anil Kumar Nayak, Igor M. Filanovsky, Kambiz Moez, Amalendu Patnaik
2025A 16-channel ASIC for in-vivo measurement of pancreatic beta-cell activity and FOPP detection.Moustafa Nawito, Harald Richter, Jens Anders, Joachim N. Burghartz
2025Alternating Greedy Schedules: Enabling Low-Bitwidth Accumulation of Dot Products in Neural Network Computations.Vikas Natesh, H. T. Kung
2025REVBiT 2.0: REVerse Engineering of BiTstream for LUT Extraction, Boolean Logic, and Pin Combination Identification.Anmol Singh Narwariya, Aniruddha Paradkar, Pabitra Das, Amit Acharyya
1,451–1,475 of 27,938← PreviousNext →

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