| 2019 | TIP: A Temperature Effect Inversion-Aware Ultra-Low Power System-on-Chip Platform. | Kyuseung Han, Sukho Lee, Jae-Jin Lee, Woojoo Lee, Massoud Pedram |
| 2019 | MemGANs: Memory Management for Energy-Efficient Acceleration of Complex Computations in Hardware Architectures for Generative Adversarial Networks. | Muhammad Abdullah Hanif, Muhammad Zuhaib Akbar, Rehan Ahmed, Semeen Rehman, Axel Jantsch, Muhammad Shafique |
| 2019 | RAPID: A ReRAM Processing in-Memory Architecture for DNA Sequence Alignment. | Saransh Gupta, Mohsen Imani, Behnam Khaleghi, Venkatesh Kumar, Tajana Rosing |
| 2019 | Comparative evaluation of Body Biasing and Voltage Scaling for Low-Power Design on 28nm UTBB FD-SOI Technology. | Ricardo Gomez Gomez, Edwige Bano, Sylvain Clerc |
| 2019 | A Low-Energy Inductive Transceiver using Spike-Latency Encoding for Wireless 3D Integration. | Benjamin J. Fletcher, Shidhartha Das, Terrence S. T. Mak |
| 2019 | Muffin: Minimally-Buffered Zero-Delay Power-Gating Technique in On-Chip Routers. | Hossein Farrokhbakht, Hadi Mardani Kamali, Natalie D. Enright Jerger |
| 2019 | BottleNet: A Deep Learning Architecture for Intelligent Mobile Cloud Computing Services. | Amir Erfan Eshratifar, Amirhossein Esmaili, Massoud Pedram |
| 2019 | Exploring the Relation between Monolithic 3D L1 GPU Cache Capacity and Warp Scheduling Efficiency. | Cong Thuan Do, Young-Ho Gong, Cheol Hong Kim, Seon Wook Kim, Sung Woo Chung |
| 2019 | Energy-Autonomous MCU Operating in sub-VT Regime with Tightly-Integrated Energy-Harvester : A SoC for IoT smart nodes containing a MCU with minimum-energy point of 2.9pJ/cycle and a harvester with output power range from sub-W to 4.32mW. | Jian Deng, Jean-Luc Nagel, Loc Zahnd, Marc Pons, David Ruffieux, Claude Arm, Pascal Persechini, Stphane Emery |
| 2019 | An Automated Approximation Methodology for Arithmetic Circuits. | Sayandip De, Jos Huisken, Henk Corporaal |
| 2019 | Local Learning in RRAM Neural Networks with Sparse Direct Feedback Alignment. | Brian Crafton, Matt West, Padip Basnet, Eric Vogel, Arijit Raychowdhury |
| 2019 | FPGA-based Acceleration of Binary Neural Network Training with Minimized Off-Chip Memory Access. | Pavan Kumar Chundi, Peiye Liu, Sangsu Park, Seho Lee, Mingoo Seok |
| 2019 | Automatic GDSII Generator for On-Chip Voltage Regulator for Easy Integration in Digital SoCs. | Venkata Chaitanya Krishna Chekuri, Nihar Dasari, Arvind Singh, Saibal Mukhopadhyay |
| 2019 | FLASH: Content-based Power-saving Design for Scrolling Operations in Browser Applications on Mobile OLED Devices. | Hao-Chun Chang, Yu-Chieh Yang, Liang-Yan Yu, Chun-Han Lin |
| 2019 | TEA-DNN: the Quest for Time-Energy-Accuracy Co-optimized Deep Neural Networks. | Lile Cai, Anne-Maelle Barneche, Arthur Herbout, Chuan Sheng Foo, Jie Lin, Vijay Ramaseshan Chandrasekhar, Mohamed M. Sabry Aly |
| 2019 | Towards a Complete Methodology for Synthesizing Bundled-Data Asynchronous Circuits on FPGAs. | Kshitij Bhardwaj, Paolo Mantovani, Luca P. Carloni, Steven M. Nowick |
| 2019 | MessageFusion: On-path Message Coalescing for Energy Efficient and Scalable Graph Analytics. | Leul Belayneh, Abraham Addisie, Valeria Bertacco |
| 2019 | Battery-Aware Electric Truck Delivery Route Planner. | Donkyu Baek, Yukai Chen, Enrico Macii, Massimo Poncino, Naehyuck Chang |
| 2019 | 3DTUBE: A Design Framework for High-Variation Carbon Nanotube-based Transistor Technology. | Aporva Amarnath, Javad Bagherzadeh, Jielun Tan, Ronald G. Dreslinski |
| 2019 | Addressing Temporal Variations in Qubit Quality Metrics for Parameterized Quantum Circuits. | Mahabubul Alam, Abdullah Ash-Saki, Swaroop Ghosh |
| 2019 | On Trade-off Between Static and Dynamic Power Consumption in NoC Power Gating. | Di Zhu, Yunfan Li, Lizhong Chen |
| 2018 | GAS: A Heterogeneous Memory Architecture for Graph Processing. | Minxuan Zhou, Mohsen Imani, Saransh Gupta, Tajana Rosing |
| 2018 | Blacklist Core: Machine-Learning Based Dynamic Operating-Performance-Point Blacklisting for Mitigating Power-Management Security Attacks. | Sheng Zhang, Adrian Tang, Zhewei Jiang, Simha Sethumadhavan, Mingoo Seok |
| 2018 | Value-driven Synthesis for Neural Network ASICs. | Zhiyuan Yang, Ankur Srivastava |
| 2018 | A Fully Onchip Binarized Convolutional Neural Network FPGA Impelmentation with Accurate Inference. | Li Yang, Zhezhi He, Deliang Fan |