Synthesis of resonant clock networks supporting dynamic voltage / frequency scaling.
Seyong Ahn, Minseok Kang, Marios C. Papaefthymiou, Taewhan Kim
Browse the full ASPDAC paper archive.
Seyong Ahn, Minseok Kang, Marios C. Papaefthymiou, Taewhan Kim
Browse the full ASPDAC paper archive.