VeriSketch: Synthesizing Secure Hardware Designs with Timing-Sensitive Information Flow Properties.
Armaiti Ardeshiricham, Yoshiki Takashima, Sicun Gao, Ryan Kastner
Browse the full CCS paper archive.
Armaiti Ardeshiricham, Yoshiki Takashima, Sicun Gao, Ryan Kastner
Browse the full CCS paper archive.