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Ryan Kastner

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

107

Venues

28

Active years

1999–2026

Best venue rank

A*

Where they publish

Papers

107 indexed papers, newest first.

YearVenueTitleAuthors
2026ASPLOSPrioriFI: More Informed Fault Injection for Edge Neural Networks.Olivia Weng, Andres Meza, Nhan Tran, Ryan Kastner
2026FCCMReconfigurable Computing Challenge: Transformer for Jet Tagging on Versal AI Engines.Gram Koski, Sean Lipps, Zhenghua Ma, G. Abarajithan, Ryan Kastner
2025DACFastPath: A Hybrid Approach for Efficient Hardware Security Verification.Lucas Deutschmann, Andres Meza, Dominik Stoffel, Wolfgang Kunz, Ryan Kastner
2025FPGAGreater than the Sum of its LUTs: Scaling Up LUT-based Neural Networks with AmigoLUT.Olivia Weng, Marta Andronic, Danial Zuberi, Jiaqing Chen, Caleb Geniesse, George A. Constantinides, Nhan Tran, Nicholas J. Fraser, Javier Mauricio Duarte, Ryan Kastner
2024ASPLOSPentimento: Data Remanence in Cloud FPGAs.Colin Drewes, Olivia Weng, Andres Meza, Alric Althoff, David Kohlbrenner, Ryan Kastner, Dustin Richmond
2024ICCADeXpect: On the Security Implications of Violations in AXI Implementations.Melisande Zonta-Roudes, Andres Meza, Nora Hinderling, Lucas Deutschmann, Francesco Restuccia, Ryan Kastner, Shweta Shinde
2024VTSReliable edge machine learning hardware for scientific applications.Tommaso Baldi, Javier Campos, Benjamin Hawks, Jennifer Ngadiuba, Nhan Tran, Daniel Diaz, Javier M. Duarte, Ryan Kastner, Andres Meza, Melissa Quinnan, Olivia Weng, Caleb Geniesse, Amir Gholami, Michael W. Mahoney, Vladimir Loncar, Philip C. Harris, Joshua Agar, Shuyu Qin
2023ASPLOSJunkyard Computing: Repurposing Discarded Smartphones to Minimize Carbon.Jennifer Switzer, Gabriel Marcano, Ryan Kastner, Pat Pannuto
2023CVPRWithin-Camera Multilayer Perceptron DVS Denoising.Antonio Rios-Navarro, S. Guo, G. Abarajithan, K. Vijayakumar, Alejandro Linares-Barranco, Thea Aarrestad, Ryan Kastner, Tobi Delbruck
2023FPGATurn on, Tune in, Listen up: Maximizing Side-Channel Recovery in Time-to-Digital Converters.Colin Drewes, Olivia Weng, Keegan Ryan, Bill Hunter, Christopher McCarty, Ryan Kastner, Dustin Richmond
2023FPGAAdapting Skip Connections for Resource-Efficient FPGA Inference.Olivia Weng, Gabriel Marcano, Vladimir Loncar, Alireza Khodamoradi, Nojan Sheybani, Farinaz Koushanfar, Kristof Denolf, Javier Mauricio Duarte, Ryan Kastner
2023VTSSpecial Session: CAD for Hardware Security - Promising Directions for Automation of Security Assurance.Sohrab Aftabjahani, Mark Tehranipoor, Farimah Farahmandi, Bulbul Ahmed, Ryan Kastner, Francesco Restuccia, Andres Meza, Kaki Ryan, Nicole Fern, Jasper Van Woudenberg, Rajesh Velegalati, Cees-Bart Breunesse, Cynthia Sturton, Calvin Deutschbein
2022DACAutomating hardware security property generation: invited.Ryan Kastner, Francesco Restuccia, Andres Meza, Sayak Ray, Jason M. Fung, Cynthia Sturton
2021CCSIsadora: Automated Information Flow Property Generation for Hardware Designs.Calvin Deutschbein, Andres Meza, Francesco Restuccia, Ryan Kastner, Cynthia Sturton
2021DACClassifying Computations on Multi-Tenant FPGAs.Mustafa S. Gobulukoglu, Colin Drewes, William Hunter, Ryan Kastner, Dustin Richmond
2021FCCMA Tunable Dual-Edge Time-to-Digital Converter.Colin Drewes, Steven Harris, Winnie Wang, Richard Appen, Olivia Weng, Ryan Kastner, William Hunter, Christopher McCarty, Dustin Richmond
2021FPGAClassifying Computations on Multi-Tenant FPGAs.Mustafa S. Gobulukoglu, Colin Drewes, Bill Hunter, Dustin Richmond, Ryan Kastner
2021FPGAS2N2: A FPGA Accelerator for Streaming Spiking Neural Networks.Alireza Khodamoradi, Kristof Denolf, Ryan Kastner
2021ICCADiSTELLAR: intermittent Signature aTtenuation Embedded CRYPTO with Low-Level metAl Routing.Jeremy Blackstone, Debayan Das, Alric Althoff, Shreyas Sen, Ryan Kastner
2021ICCADAker: A Design and Verification Framework for Safe and Secure SoC Access Control.Francesco Restuccia, Andres Meza, Ryan Kastner
2021IJCNNASLR: An Adaptive Scheduler for Learning Rate.Alireza Khodamoradi, Kristof Denolf, Kees A. Vissers, Ryan Kastner
2021MASSPyrenote: a Web-based, Manual Annotation Tool for Passive Acoustic Monitoring.Sean Perry, Vaibhav Tiwari, Nishant Balaji, Erika Joun, Jacob Ayers, Mathias Tobler, Ian Ingram, Ryan Kastner, Curt Schurgers
2021VTSSpecial Session: CAD for Hardware Security - Automation is Key to Adoption of Solutions.Sohrab Aftabjahani, Ryan Kastner, Mark Tehranipoor, Farimah Farahmandi, Jason Oberg, Anders Nordstrom, Nicole Fern, Alric Althoff
2019CCSVeriSketch: Synthesizing Secure Hardware Designs with Timing-Sensitive Information Flow Properties.Armaiti Ardeshiricham, Yoshiki Takashima, Sicun Gao, Ryan Kastner
2019ICCADHolistic Power Side-Channel Leakage Assessment: Towards a Robust Multidimensional Metric.Alric Althoff, Jeremy Blackstone, Ryan Kastner
2019ICCADFastWave: Accelerating Autoregressive Convolutional Neural Networks on FPGA.Shehzeen Hussain, Mojan Javaheripi, Paarth Neekhara, Ryan Kastner, Farinaz Koushanfar
2019ISVCBenchmarking Video with the Surgical Image Registration Generator (SIRGn) Baseline.Michael Barrow, Nelson Ho, Alric Althoff, Peter Tueller, Ryan Kastner
2019MASSD-SEA: The Underwater Depth Sensing Device for Standalone Time-Averaged Measurements.Charmaine Beluso, Anfeng Xu, Eamon Patamasing, Brian Sebastian, Eric Lo, Curt Schurgers, Ryan Kastner, Liren Chen, Xuanyi Yu, Dan Sturm, Robert Barlow
2018DATEExamining the consequences of high-level synthesis optimizations on power side-channel.Lu Zhang, Wei Hu, Armaiti Ardeshiricham, Yu Tai, Jeremy Blackstone, Dejun Mu, Ryan Kastner
2018FPLA FPGA Accelerator for Real-Time 3D Non-rigid Registration Using Tree Reweighted Message Passing and Dynamic Markov Random Field Generation.Michael Barrow, Steven M. Burns, Ryan Kastner
2018FPLEveryone's a Critic: A Tool for Exploring RISC-V Projects.Dustin Richmond, Michael Barrow, Ryan Kastner
2018ICCADProperty specific information flow analysis for hardware security verification.Wei Hu, Armaiti Ardeshiricham, Mustafa S. Gobulukoglu, Xinmu Wang, Ryan Kastner
2018ISCAHiding Intermittent Information Leakage with Architectural Support for Blinking.Alric Althoff, Joseph McMahan, Luis Vega, Scott Davidson, Timothy Sherwood, Michael B. Taylor, Ryan Kastner
2017DACAn Architecture for Learning Stream Distributions with Application to RNG Testing.Alric Althoff, Ryan Kastner
2017DACArbitrary Precision and Complexity Tradeoffs for Gate-Level Information Flow Tracking.Andrew Becker, Wei Hu, Yu Tai, Philip Brisk, Ryan Kastner, Paolo Ienne
2017DATERegister transfer level information flow tracking for provably secure hardware design.Armaiti Ardeshiricham, Wei Hu, Joshua Marxen, Ryan Kastner
2017ICCADClepsydra: Modeling timing flows in hardware designs.Armaiti Ardeshiricham, Wei Hu, Ryan Kastner
2017ICCADWhy you should care about don't cares: Exploiting internal don't care conditions for hardware Trojans.Wei Hu, Lu Zhang, Armaiti Ardeshiricham, Jeremy Blackstone, Bochuan Hou, Yu Tai, Ryan Kastner
2017ICCADA streaming clustering approach using a heterogeneous system for big data analysis.Dajung Lee, Alric Althoff, Dustin Richmond, Ryan Kastner
2016DATEQuantifying hardware security using joint information flow analysis.Ryan Kastner, Wei Hu, Alric Althoff
2016DATEComposable, parameterizable templates for high-level synthesis.Janarbek Matai, Dajung Lee, Alric Althoff, Ryan Kastner
2016DATEAdaptive Threshold Non-Pareto Elimination: Re-thinking machine learning for system level design space exploration on FPGAs.Pingfan Meng, Alric Althoff, Quentin Gautier, Ryan Kastner
2016FCCMTinker: Generating Custom Memory Architectures for Altera's OpenCL Compiler.Dustin Richmond, Jeremy Blackstone, Matthew Hogains, Kevin Thai, Ryan Kastner
2016FPGAResolve: Generation of High-Performance Sorting Architectures from High-Level Synthesis.Janarbek Matai, Dustin Richmond, Dajung Lee, Zac Blair, Qiongzhi Wu, Amin Abazari, Ryan Kastner
2016ICCADImprecise security: quality and complexity tradeoffs for hardware information flow tracking.Wei Hu, Andrew Becker, Armita Ardeshiricham, Yu Tai, Paolo Ienne, Dejun Mu, Ryan Kastner
2015FPLA scalable FPGA architecture for nonnegative least squares problems.Alric Althoff, Ryan Kastner
2015ICCADQuantifying Timing-Based Information Flow in Cryptographic Hardware.Baolei Mao, Wei Hu, Alric Althoff, Janarbek Matai, Jason Oberg, Dejun Mu, Timothy Sherwood, Ryan Kastner
2014ASPLOSSapper: a language for hardware-level security policy enforcement.Xun Li, Vineeth Kashyap, Jason K. Oberg, Mohit Tiwari, Vasanth Ram Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, Frederic T. Chong
2014FCCMFPGA Accelerated Online Boosting for Multi-target Tracking.Matthew Jacobsen, Pingfan Meng, Siddarth Sampangi, Ryan Kastner
2014FPLImproving FPGA accelerated tracking with multiple online trained classifiers.Matthew Jacobsen, Siddarth Sampangi, Yoav Freund, Ryan Kastner
2014FPLHigh throughput channel tracking for JTRS wireless channel emulation.Dajung Lee, Janarbek Matai, Brad T. Weals, Ryan Kastner
2014FPLHardware accelerated novel optical de novo assembly for large-scale genomes.Pingfan Meng, Matthew Jacobsen, Motoki Kimura, Vladimir Dergachev, Thomas Anantharaman, Michael Requa, Ryan Kastner
2014MASSSmall Unmanned Aerial Vehicle System for Wildlife Radio Collar Tracking.Gilberto Antonio Marcon dos Santos, Zachary Barnes, Eric Lo, Bryan Ritoper, Lauren Nishizaki, Xavier Tejeda, Alex Ke, Han Lin, Curt Schurgers, Albert Lin, Ryan Kastner
2013DATEA practical testing framework for isolating hardware timing channels.Jason Oberg, Sarah Meiklejohn, Timothy Sherwood, Ryan Kastner
2013FPLRIFFA 2.0: A reusable integration framework for FPGA accelerators.Matthew Jacobsen, Ryan Kastner
2013FPLA hardware accelerated approach for imaging flow cytometry.Dajung Lee, Pingfan Meng, Matthew Jacobsen, Henry Tse, Dino Di Carlo, Ryan Kastner
2013FPLA FPGA design for high speed feature extraction from a compressed measurement stream.Dustin Richmond, Ryan Kastner, Ali Irturk, John McGarry
2013ISCASurfNoC: a low latency and provably non-interfering approach to secure networks-on-chip.Hassan M. G. Wassel, Ying Gao, Jason Oberg, Ted Huffmire, Ryan Kastner, Frederic T. Chong, Timothy Sherwood
2013PLDIPosition paper: Sapper - a language for provable hardware policy enforcement.Xun Li, Vineeth Kashyap, Jason K. Oberg, Mohit Tiwari, Vasanth Ram Rajarathinam, Ryan Kastner, Timothy Sherwood, Ben Hardekopf, Frederic T. Chong
2012FCCMRIFFA: A Reusable Integration Framework for FPGA Accelerators.Matthew Jacobsen, Yoav Freund, Ryan Kastner
2012ICCADSimultaneous information flow security and circuit redundancy in Boolean gates.Wei Hu, Jason Oberg, Dejun Mu, Ryan Kastner
2011CAIPJBoost Optimization of Color Detectors for Autonomous Underwater Vehicle Navigation.Christopher Barngrover, Serge J. Belongie, Ryan Kastner
2011DACInformation flow isolation in I2C and USB.Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner
2011FCCMDesign and Implementation of an FPGA-Based Real-Time Face Recognition System.Janarbek Matai, Ali Irturk, Ryan Kastner
2011ISCACrafting a usable microkernel, processor, and I/O system with strict and provable information flow security.Mohit Tiwari, Jason Oberg, Xun Li, Jonathan Valamehr, Timothy E. Levin, Ben Hardekopf, Ryan Kastner, Frederic T. Chong, Timothy Sherwood
2010ACSACHardware assistance for trustworthy systems through 3-D integration.Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner, Ted Huffmire, Cynthia E. Irvine, Timothy E. Levin
2010CASESHardware trust implications of 3-D integration.Ted Huffmire, Timothy E. Levin, Michael Bilzor, Cynthia E. Irvine, Jonathan Valamehr, Mohit Tiwari, Timothy Sherwood, Ryan Kastner
2010DACTheoretical analysis of gate level information flow tracking.Jason Oberg, Wei Hu, Ali Irturk, Mohit Tiwari, Timothy Sherwood, Ryan Kastner
2010FCCMIncreased Performace of FPGA-Based Color Classification System.Junguk Cho, Bridget Benson, Sunsern Cheamanunkul, Ryan Kastner
2010FCCMAccelerating Viola-Jones Face Detection to FPGA-Level Using GPUs.Daniel Hefenbrock, Jason Oberg, Nhat Thanh, Ryan Kastner, Scott B. Baden
2010FPLField Programmable Gate Array Implementation of Parts-Based Object Detection for Real Time Video Applications.Deborah Goshorn, Junguk Cho, Ryan Kastner, Shahnam Mirzaei
2009DACXquasher: a tool for efficient computation of multiple linear expressions.Arash Arfaee, Ali Irturk, Nikolay Laptev, Farzan Fallah, Ryan Kastner
2009FPGAFpga-based face detection system using Haar classifiers.Junguk Cho, Shahnam Mirzaei, Jason Oberg, Ryan Kastner
2009WCNCArchitectural optimization of decomposition algorithms for wireless communication systems.Ali Irturk, Bridget Benson, Nikolay Laptev, Ryan Kastner
2008MOBICOMSurvey of hardware platforms for an energy efficient implementation of matching pursuits algorithm for shallow water networks.Bridget Benson, Ali Irturk, Junguk Cho, Ryan Kastner
2007ICCADCombining static and dynamic defect-tolerance techniques for nanoscale memory systems.Susmit Biswas, Gang Wang, Tzvetan S. Metodi, Ryan Kastner, Frederic T. Chong
2007WCNCImplementation of the Alamouti OSTBC to a Distributed Set of Single-Antenna Wireless Nodes.Richard E. Cagley, Brad T. Weals, Scott A. McNally, Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner
2007SPMoats and Drawbridges: An Isolation Primitive for Reconfigurable Hardware Based Systems.Ted Huffmire, Brett Brotherton, Gang Wang, Timothy Sherwood, Ryan Kastner, Timothy E. Levin, Thuy D. Nguyen, Cynthia E. Irvine
2006DACLeakage power reduction of embedded memories on FPGAs through location assignment.Yan Meng, Timothy Sherwood, Ryan Kastner
2006DACDesign space exploration using time and resource duality with the ant colony optimization.Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner
2006DATEOptimizing high speed arithmetic circuits using three-term extraction.Anup Hosangadi, Farzan Fallah, Ryan Kastner
2006DATELayout driven data communication optimization for high level synthesis.Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh
2006ESORICSPolicy-Driven Memory Protection for Reconfigurable Hardware.Ted Huffmire, Shreyas Prasad, Timothy Sherwood, Ryan Kastner
2006FCCMDefect-Tolerant Nanocomputing Using Bloom Filters.Gang Wang, Wenrui Gong, Ryan Kastner
2006FPGAHigh speed FIR filter implementation using add and shift method.Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner
2006GLOBECOMCarrier Offset and Channel Estimation for Cooperative MIMO Sensor Networks.Ronald A. Iltis, Shahnam Mirzaei, Ryan Kastner, Richard E. Cagley, Brad T. Weals
2006ICCADOn the use of Bloom filters for defect maps in nanocomputing.Gang Wang, Wenrui Gong, Ryan Kastner
2006ICCDFPGA Implementation of High Speed FIR Filters Using Add and Shift Method.Shahnam Mirzaei, Anup Hosangadi, Ryan Kastner
2006MOBICOMDesign of a low-cost acoustic modem for moored oceanographic applications.Bridget Benson, Grace Chang, Derek Manov, Brian Graham, Ryan Kastner
2005ASPDACReducing hardware complexity of linear DSP systems by iteratively eliminating two-term common subexpressions.Anup Hosangadi, Farzan Fallah, Ryan Kastner
2005DACMP core: algorithm and design techniques for efficient channel estimation in wireless applications.Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timothy Sherwood, Hua Lee, Ryan Kastner
2005FPGAHARP: hard-wired routing pattern FPGAs.Satish Sivaswamy, Gang Wang, Cristinel Ababei, Kia Bazargan, Ryan Kastner, Eli Bozorgzadeh
2005HPCAOn the Limits of Leakage Power Reduction in Caches.Yan Meng, Timothy Sherwood, Ryan Kastner
2005ICCADStorage assignment during high-level synthesis for configurable architectures.Wenrui Gong, Gang Wang, Ryan Kastner
2005MASSEfficient distributed algorithms for data fusion and node localization in mobile ad-hoc networks.Andrew P. Brown, Ronald A. Iltis, Ryan Kastner
2005VLSIDEnergy Efficient Hardware Synthesis of Polynomial Expressions.Anup Hosangadi, Farzan Fallah, Ryan Kastner
2004ICCADFactoring and eliminating common subexpressions in polynomial expressions.Anup Hosangadi, Farzan Fallah, Ryan Kastner
2003DACData communication estimation and reduction for reconfigurable systems.Adam Kaplan, Philip Brisk, Ryan Kastner
2002CASESInstruction generation and regularity extraction for reconfigurable processors.Philip Brisk, Adam Kaplan, Ryan Kastner, Majid Sarrafzadeh
2001DACCreating and Exploiting Flexibility in Steiner Trees.Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh
2001ICCADInstruction Generation for Hybrid Reconfigurable Systems.Ryan Kastner, Seda Ogrenci Memik, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2001ICCADA Super-Scheduler for Embedded Reconfigurable Systems.Seda Ogrenci Memik, Elaheh Bozorgzadeh, Ryan Kastner, Majid Sarrafzadeh
2001ICCADCongestion Reduction During Placement Based on Integer Programming.Xiaojian Yang, Ryan Kastner, Majid Sarrafzadeh
2000FCCMA C to Hardware/Software Compiler.Kia Bazargan, Ryan Kastner, Seda Ogrenci, Majid Sarrafzadeh
2000ICCADPredictable Routing.Ryan Kastner, Elaheh Bozorgzadeh, Majid Sarrafzadeh
2000ICCADTiming Driven Gate Duplication: Complexity Issues and Algorithms.Ankur Srivastava, Ryan Kastner, Majid Sarrafzadeh
1999RSP3-D Floorplanning: Simulated Annealing and Greedy Placement Methods for Reconfigurable Computing Systems.Kia Bazargan, Ryan Kastner, Majid Sarrafzadeh