Scalable sequence-constrained retention register minimization in power gating design.
Ting-Wei Chiang, Kai-Hui Chang, Yen-Ting Liu, Jie-Hong R. Jiang
Browse the full DAC paper archive.
Ting-Wei Chiang, Kai-Hui Chang, Yen-Ting Liu, Jie-Hong R. Jiang
Browse the full DAC paper archive.