Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs.
Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong
Browse the full DAC paper archive.
Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong
Browse the full DAC paper archive.