| 2026 | ASPDAC | FIFOAdvisor: A DSE Framework for Automated FIFO Sizing of High-Level Synthesis Designs. | Stefan Abi-Karam, Rishov Sarkar, Suhail Basalama, Jason Cong, Callie Hao |
| 2026 | FCCM | LUT-LLM: Efficient Language Model Inference with Memory-based Computations on FPGAs. | Zifan He, Shengyu Ye, Rui Ma, Yang Wang, Jason Cong |
| 2026 | FCCM | When Systolic Arrays Meet AI Engines: Architectural Constraints on AMD Versal ACAP. | Jason Kimko, Jason Cong |
| 2026 | FCCM | Enabling Context-Switchable Monolithic 3D FPGA Design Using Bistable Ferroelectric Inverters. | Faaiq G. Waqar, Matthew Chen, Zifan He, Zishen Wan, Minji Shon, Wei-Hsing Huang, Jason Cong, Shimeng Yu |
| 2026 | FPGA | AgRefactor: Refactoring for HLS Compatibility with a Self-Evolving Agentic Workflow. | Yang Zou, Zijian Ding, Chi Wang, Yizhou Sun, Jason Cong |
| 2026 | ISCA | SegFold: Accelerating Sparse Gemm with a Fine-Grained Dynamic Dataflow. | Xinrui Wu, Hanyu Wang, Jason Cong, Tony Nowatzki |
| 2025 | AAAI | Hierarchical Mixture of Experts: Generalizable Learning for High-Level Synthesis. | Weikai Li, Ding Wang, Zijian Ding, Atefeh Sohrabizadeh, Zongyue Qin, Jason Cong, Yizhou Sun |
| 2025 | AAAI | Dynamic-Width Speculative Beam Decoding for LLM Inference. | Zongyue Qin, Zifan He, Neha Prakriya, Jason Cong, Yizhou Sun |
| 2025 | ASPDAC | Compilation for Dynamically Field-Programmable Qubit Arrays with Efficient and Provably Near-Optimal Scheduling. | Daniel Bochen Tan, Wan-Hsuan Lin, Jason Cong |
| 2025 | DAC | Assessing Quantum Layout Synthesis Tools via Known Optimal-SWAP Cost Benchmarks. | Shuohao Ping, Wan-Hsuan Lin, Daniel Bochen Tan, Jason Cong |
| 2025 | DAC | Monolithic 3D FPGA Design and Synthesis with Back-End-of-Line Configuration Memories. | Faaiq G. Waqar, Jiahao Zhang, Anni Lu, Zifan He, Jason Cong, Shimeng Yu |
| 2025 | FCCM | InTAR: Inter-Task Auto-Reconfigurable Accelerator Design for High Data Volume Variation in DNNs. | Zifan He, Anderson Truong, Yingqi Cao, Jason Cong |
| 2025 | FCCM | NoH: NoC Compilation in High-Level Synthesis. | Huifeng Ke, Sihao Liu, Licheng Guo, Zifan He, Linghao Song, Suhail Basalama, Yuze Chi, Tony Nowatzki, Jason Cong |
| 2025 | FCCM | HP-FFT: A General High-Performance FFT Generator Using High-Level Synthesis. | Chengyue Wang, Jiahao Zhang, Yingquan Wu, Jason Cong |
| 2025 | FPGA | Stream-HLS: Towards Automatic Dataflow Acceleration. | Suhail Basalama, Jason Cong |
| 2025 | FPGA | InTRRA: Inter-Task Resource-Repurposing Accelerator for Efficient Transformer Inference on FPGAs. | Zifan He, Hersh Gupta, Huifeng Ke, Jason Cong |
| 2025 | FPGA | SAT-Accel: A Modern SAT Solver on a FPGA. | Michael Lo, Mau-Chung Frank Chang, Jason Cong |
| 2025 | FPGA | A Unified Framework for Automated Code Transformation and Pragma Insertion. | Stphane Pouget, Louis-Nol Pouchet, Jason Cong |
| 2025 | HPCA | Reuse-Aware Compilation for Zoned Quantum Architectures Based on Neutral Atoms. | Wan-Hsuan Lin, Daniel Bochen Tan, Jason Cong |
| 2025 | ICCAD | Automated Design Space Exploration in High-Level Physical Synthesis. | Linfeng Du, Jiawei Liang, Jason Lau, Yuze Chi, Yutong Xie, Chunyou Su, Afzal Ahmad, Zifan He, Jake Ke, Jinming Ge, Jason Cong, Wei Zhang, Licheng Guo |
| 2025 | ICCAD | Routing-Aware Placement for Zoned Neutral Atom-based Quantum Computing. | Yannick Stade, Wan-Hsuan Lin, Jason Cong, Robert Wille |
| 2025 | ICLR | Optimized Multi-Token Joint Decoding With Auxiliary Model for LLM Inference. | Zongyue Qin, Ziniu Hu, Zifan He, Neha Prakriya, Jason Cong, Yizhou Sun |
| 2025 | ISCA | Reconfigurable Stream Network Architecture. | Chengyue Wang, Xiaofan Zhang, Jason Cong, James C. Hoe |
| 2025 | NAACL | HMT: Hierarchical Memory Transformer for Efficient Long Context Language Processing. | Zifan He, Yingqi Cao, Zongyue Qin, Neha Prakriya, Yizhou Sun, Jason Cong |
| 2025 | QCE | Compilation of Qcrank Encoding Algorithm for a Dynamically Programmable Qubit Array Processor. | Jan Balewski, Wan-Hsuan Lin, Anupam Mitra, Milan Kornjaca, Stefan Ostermann, Pedro L. S. Lopes, Daniel Bochen Tan, Jason Cong |
| 2024 | ASPLOS | TAPA-CS: Enabling Scalable Accelerator Design on Distributed HBM-FPGAs. | Neha Prakriya, Yuze Chi, Suhail Basalama, Linghao Song, Jason Cong |
| 2024 | DAC | Q-Pilot: Field Programmable Qubit Array Compilation with Flying Ancillas. | Hanrui Wang, Daniel Bochen Tan, Pengyu Liu, Yilian Liu, Jiaqi Gu, Jason Cong, Song Han |
| 2024 | DAC | SpectraFlux: Harnessing the Flow of Multi-FPGA in Mass Spectrometry Clustering. | Tianqi Zhang, Neha Prakriya, Sumukh Pinge, Jason Cong, Tajana Rosing |
| 2024 | DATE | Depth-Optimal Addressing of 2D Qubit Array with 1D Controls Based on Exact Binary Matrix Factorization. | Daniel Bochen Tan, Shuohao Ping, Jason Cong |
| 2024 | DATE | Quantum State Preparation Using an Exact CNOT Synthesis Formulation. | Hanyu Wang, Jason Cong, Giovanni De Micheli |
| 2024 | FPGA | LevelST: Stream-based Accelerator for Sparse Triangular Solver. | Zifan He, Linghao Song, Robert F. Lucas, Jason Cong |
| 2024 | FPGA | Automatic Hardware Pragma Insertion in High-Level Synthesis: A Non-Linear Programming Approach. | Stphane Pouget, Louis-Nol Pouchet, Jason Cong |
| 2024 | ICCAD | Efficient Task Transfer for HLS DSE. | Zijian Ding, Atefeh Sohrabizadeh, Weikai Li, Zongyue Qin, Yizhou Sun, Jason Cong |
| 2024 | ICCAD | RapidStream IR: Infrastructure for FPGA High-Level Physical Synthesis. | Jason Lau, Yuanlong Xiao, Yutong Xie, Yuze Chi, Linghao Song, Shaojie Xiang, Michael Lo, Zhiru Zhang, Jason Cong, Licheng Guo |
| 2024 | ICCAD | GNN-Based Performance Prediction of Quantum Optimization of Maximum Independent Set. | Atefeh Sohrabizadeh, Wan-Hsuan Lin, Daniel Bochen Tan, Madelyn Cain, Sheng-Tao Wang, Mikhail D. Lukin, Jason Cong |
| 2024 | ICCAD | Quantum State Preparation Circuit Optimization Exploiting Don't Cares. | Hanyu Wang, Daniel Bochen Tan, Jason Cong |
| 2024 | ISCA | Atomique: A Quantum Compiler for Reconfigurable Neutral Atom Arrays. | Hanrui Wang, Pengyu Liu, Daniel Bochen Tan, Yilian Liu, Jiaqi Gu, David Z. Pan, Jason Cong, Umut A. Acar, Song Han |
| 2023 | DAC | A Comprehensive Automated Exploration Framework for Systolic Array Designs. | Suhail Basalama, Jie Wang, Jason Cong |
| 2023 | DAC | Lightning Talk: Scaling Up Quantum Compilation - Challenges and Opportunities. | Jason Cong |
| 2023 | DAC | Scalable Optimal Layout Synthesis for NISQ Quantum Processors. | Wan-Hsuan Lin, Jason Kimko, Bochen Tan, Nikolaj S. Bjrner, Jason Cong |
| 2023 | DAC | Rubick: A Synthesis Framework for Spatial Architectures via Dataflow Decomposition. | Zizhang Luo, Liqiang Lu, Size Zheng, Jieming Yin, Jason Cong, Jianwei Yin, Yun Liang |
| 2023 | FCCM | PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. | Moazin Khatti, Xingyu Tian, Yuze Chi, Licheng Guo, Jason Cong, Zhenman Fang |
| 2023 | FPGA | HMLib: Efficient Data Transfer for HLS Using Host Memory. | Michael Lo, Young-kyu Choi, Weikang Qiao, Mau-Chung Frank Chang, Jason Cong |
| 2023 | FPGA | Callipepla: Stream Centric Instruction Set and Mixed Precision for Accelerating Conjugate Gradient Solver. | Linghao Song, Licheng Guo, Suhail Basalama, Yuze Chi, Robert F. Lucas, Jason Cong |
| 2023 | FPGA | CHARM: Composing Heterogeneous AcceleRators for Matrix Multiply on Versal ACAP Architecture. | Jinming Zhuang, Jason Lau, Hanchen Ye, Zhuoping Yang, Yubo Du, Jack Lo, Kristof Denolf, Stephen Neuendorffer, Alex K. Jones, Jingtong Hu, Deming Chen, Jason Cong, Peipei Zhou |
| 2023 | ICCAD | Robust GNN-Based Representation Learning for HLS. | Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong |
| 2022 | DAC | Improving GNN-based accelerator design automation with meta learning. | Yunsheng Bai, Atefeh Sohrabizadeh, Yizhou Sun, Jason Cong |
| 2022 | DAC | Automated accelerator optimization aided by graph neural networks. | Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong |
| 2022 | DAC | Serpens: a high bandwidth memory based accelerator for general-purpose sparse matrix-vector multiplication. | Linghao Song, Yuze Chi, Licheng Guo, Jason Cong |
| 2022 | FCCM | A Versatile Systolic Array for Transposed and Dilated Convolution on FPGA. | Suhail Basalama, Atefeh Sohrabizadeh, Jie Wang, Jason Cong |
| 2022 | FCCM | TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs. | Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong |
| 2022 | FPGA | Accelerating SSSP for Power-Law Graphs. | Yuze Chi, Licheng Guo, Jason Cong |
| 2022 | FPGA | RapidStream: Parallel Physical Implementation of FPGA HLS Designs. | Licheng Guo, Pongstorn Maidee, Yun Zhou, Chris Lavin, Jie Wang, Yuze Chi, Weikang Qiao, Alireza Kaviani, Zhiru Zhang, Jason Cong |
| 2022 | FPGA | Automated Accelerator Optimization Aided by Graph Neural Networks. | Atefeh Sohrabizadeh, Yunsheng Bai, Yizhou Sun, Jason Cong |
| 2022 | FPGA | SPA-GCN: Efficient and Flexible GCN Accelerator with Application for Graph Similarity Computation. | Atefeh Sohrabizadeh, Yuze Chi, Jason Cong |
| 2022 | FPGA | Sextans: A Streaming Accelerator for General-Purpose Sparse-Matrix Dense-Matrix Multiplication. | Linghao Song, Yuze Chi, Atefeh Sohrabizadeh, Young-kyu Choi, Jason Lau, Jason Cong |
| 2022 | ICASSP | PYXIS: An Open-Source Performance Dataset Of Sparse Accelerators. | Linghao Song, Yuze Chi, Jason Cong |
| 2022 | ICCAD | Qubit Mapping for Reconfigurable Atom Arrays. | Bochen Tan, Dolev Bluvstein, Mikhail D. Lukin, Jason Cong |
| 2022 | ISCAS | Efficient Kernels for Real-Time Position Decoding from In Vivo Calcium Images. | Zhe Chen, Jim Zhou, Garrett J. Blair, Hugh T. Blair, Jason Cong |
| 2022 | MICRO | OverGen: Improving FPGA Usability through Domain-specific Overlay Generation. | Sihao Liu, Jian Weng, Dylan Kupsh, Atefeh Sohrabizadeh, Zhengrong Wang, Licheng Guo, Jiuyang Liu, Maxim Zhulin, Rishabh Mani, Lucheng Zhang, Jason Cong, Tony Nowatzki |
| 2021 | FCCM | Extending High-Level Synthesis for Task-Parallel Programs. | Yuze Chi, Licheng Guo, Jason Lau, Young-kyu Choi, Jie Wang, Jason Cong |
| 2021 | FCCM | FANS: FPGA-Accelerated Near-Storage Sorting. | Weikang Qiao, Jihun Oh, Licheng Guo, Mau-Chung Frank Chang, Jason Cong |
| 2021 | FMCAD | Scaling Up Hardware Accelerator Verification using A-QED with Functional Decomposition. | Saranyu Chattopadhyay, Florian Lonsing, Luca Piccolboni, Deepraj Soni, Peng Wei, Xiaofan Zhang, Yuan Zhou, Luca P. Carloni, Deming Chen, Jason Cong, Ramesh Karri, Zhiru Zhang, Caroline Trippel, Clark W. Barrett, Subhasish Mitra |
| 2021 | FPGA | MOCHA: Multinode Cost Optimization in Heterogeneous Clouds with Accelerators. | Peipei Zhou, Jiayi Sheng, Cody Hao Yu, Peng Wei, Jie Wang, Di Wu, Jason Cong |
| 2021 | FPGA | AutoSA: A Polyhedral Compiler for High-Performance Systolic Arrays on FPGA. | Jie Wang, Licheng Guo, Jason Cong |
| 2021 | FPGA | Extending High-Level Synthesis for Task-Parallel Programs. | Yuze Chi, Licheng Guo, Young-kyu Choi, Jie Wang, Jason Cong |
| 2021 | FPGA | HBM Connect: High-Performance HLS Interconnect for FPGA HBM. | Young-kyu Choi, Yuze Chi, Weikang Qiao, Nikola Samardzic, Jason Cong |
| 2021 | FPGA | AutoBridge: Coupling Coarse-Grained Floorplanning and Pipelining for High-Frequency HLS Design on Multi-Die FPGAs. | Licheng Guo, Yuze Chi, Jie Wang, Jason Lau, Weikang Qiao, Ecenur Ustun, Zhiru Zhang, Jason Cong |
| 2021 | FPGA | AutoDSE: Enabling Software Programmers Design Efficient FPGA Accelerators. | Atefeh Sohrabizadeh, Cody Hao Yu, Min Gao, Jason Cong |
| 2021 | ICCAD | Optimal Qubit Mapping with Simultaneous Gate Absorption ICCAD Special Session Paper. | Bochen Tan, Jason Cong |
| 2021 | ISCA | TENET: A Framework for Modeling Tensor Dataflow Based on Relation-centric Notation. | Liqiang Lu, Naiqing Guan, Yuyue Wang, Liancheng Jia, Zizhang Luo, Jieming Yin, Jason Cong, Yun Liang |
| 2020 | DAC | Exploiting Computation Reuse for Stencil Accelerators. | Yuze Chi, Jason Cong |
| 2020 | DAC | Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. | Licheng Guo, Jason Lau, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong |
| 2020 | DAC | A-QED Verification of Hardware Accelerators. | Eshan Singh, Florian Lonsing, Saranyu Chattopadhyay, Maxwell Strange, Peng Wei, Xiaofan Zhang, Yuan Zhou, Deming Chen, Jason Cong, Priyanka Raina, Zhiru Zhang, Clark W. Barrett, Subhasish Mitra |
| 2020 | FCCM | Algorithm-Hardware Co-design for BQSR Acceleration in Genome Analysis ToolKit. | Michael Lo, Zhenman Fang, Jie Wang, Peipei Zhou, Mau-Chung Frank Chang, Jason Cong |
| 2020 | FPGA | CANSEE: Customized Accelerator for Neural Signal Enhancement and Extraction from the Calcium Image in Real Time. | Zhe Chen, Garrett J. Blair, Hugh T. Blair, Jason Cong |
| 2020 | FPGA | Analysis and Optimization of the Implicit Broadcasts in FPGA HLS to Improve Maximum Frequency. | Licheng Guo, Jason Lau, Yuze Chi, Jie Wang, Cody Hao Yu, Zhe Chen, Zhiru Zhang, Jason Cong |
| 2020 | FPGA | HeteroHalide: From Image Processing DSL to Efficient FPGA Acceleration. | Jiajie Li, Yuze Chi, Jason Cong |
| 2020 | FPGA | End-to-End Optimization of Deep Learning Applications. | Atefeh Sohrabizadeh, Jie Wang, Jason Cong |
| 2020 | ICCAD | SuSy: A Programming Model for Productive Construction of High-Performance Systolic Arrays on FPGAs. | Yi-Hsiang Lai, Hongbo Rong, Size Zheng, Weihao Zhang, Xiuping Cui, Yunshan Jia, Jie Wang, Brendan Sullivan, Zhiru Zhang, Yun Liang, Youhui Zhang, Jason Cong, Nithin George, Jose Alvarez, Christopher J. Hughes, Pradeep Dubey |
| 2020 | ICCAD | Optimal Layout Synthesis for Quantum Computing. | Bochen Tan, Jason Cong |
| 2020 | ISCA | Bonsai: High-Performance Adaptive Merge Tree Sorting. | Nikola Samardzic, Weikang Qiao, Vaibhav Aggarwal, Mau-Chung Frank Chang, Jason Cong |
| 2020 | ICSE | HeteroRefactor: refactoring for heterogeneous computing with FPGA. | Jason Lau, Aishwarya Sivaraman, Qian Zhang, Muhammad Ali Gulzar, Jason Cong, Miryung Kim |
| 2020 | ISLPED | BLINK: bit-sparse LSTM inference kernel enabling efficient calcium trace extraction for neurofeedback devices. | Zhe Chen, Garrett J. Blair, Hugh T. Blair, Jason Cong |
| 2019 | DAC | Overcoming Data Transfer Bottlenecks in FPGA-based DNN Accelerators via Layer Conscious Memory Management. | Xuechao Wei, Yun Liang, Jason Cong |
| 2019 | FCCM | Hardware Acceleration of Long Read Pairwise Overlapping in Genome Sequencing: A Race Between FPGA and GPU. | Licheng Guo, Jason Lau, Zhenyuan Ruan, Peng Wei, Jason Cong |
| 2019 | FCCM | An FPGA-Based BWT Accelerator for Bzip2 Data Compression. | Weikang Qiao, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong |
| 2019 | FPGA | LANMC: LSTM-Assisted Non-Rigid Motion Correction on FPGA for Calcium Image Stabilization. | Zhe Chen, Hugh T. Blair, Jason Cong |
| 2019 | FPGA | Rapid Cycle-Accurate Simulator for High-Level Synthesis. | Yuze Chi, Young-kyu Choi, Jason Cong, Jie Wang |
| 2019 | FPGA | HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Reconfigurable Computing. | Yi-Hsiang Lai, Yuze Chi, Yuwei Hu, Jie Wang, Cody Hao Yu, Yuan Zhou, Jason Cong, Zhiru Zhang |
| 2019 | FPGA | Dataflow Systolic Array Implementations of Matrix Decomposition Using High Level Synthesis. | Jie Liu, Jason Cong |
| 2019 | FPGA | Overcoming Data Transfer Bottlenecks in DNN Accelerators via Layer-Conscious Memory Managment. | Xuechao Wei, Yun Liang, Peng Zhang, Cody Hao Yu, Jason Cong |
| 2019 | ICCAD | Analyzing and Modeling In-Storage Computing Workloads On EISC - An FPGA-Based System-Level Emulation Platform. | Zhenyuan Ruan, Tong He, Jason Cong |
| 2019 | ISCAS | Frequency Improvement of Systolic Array-Based CNNs on FPGAs. | Jiaxi Zhang, Wentai Zhang, Guojie Luo, Xuechao Wei, Yun Liang, Jason Cong |
| 2019 | USENIX | INSIDER: Designing In-Storage Computing System for Emerging High-Performance Drive. | Zhenyuan Ruan, Tong He, Jason Cong |
| 2018 | DAC | Automated accelerator generation and optimization with composable, parallel and pipeline architecture. | Jason Cong, Peng Wei, Cody Hao Yu, Peng Zhang |
| 2018 | DAC | S2FA: an accelerator automation framework for heterogeneous computing in datacenters. | Cody Hao Yu, Peng Wei, Max Grossman, Peng Zhang, Vivek Sarkar, Jason Cong |
| 2018 | FCCM | Understanding Performance Differences of FPGAs and GPUs. | Jason Cong, Zhenman Fang, Michael Lo, Hanrui Wang, Jingxian Xu, Shaochong Zhang |
| 2018 | FCCM | SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for DNA Sequencing. | Jason Cong, Licheng Guo, Po-Tsang Huang, Peng Wei, Tianhe Yu |
| 2018 | FCCM | Automatic Interior I/O Elimination in Systolic Array Architecture. | Jason Cong, Jie Wang |
| 2018 | FCCM | Latte: Locality Aware Transformation for High-Level Synthesis. | Jason Cong, Peng Wei, Cody Hao Yu, Peipei Zhou |
| 2018 | FCCM | High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms. | Weikang Qiao, Jieqiong Du, Zhenman Fang, Michael Lo, Mau-Chung Frank Chang, Jason Cong |
| 2018 | FCCM | ST-Accel: A High-Level Programming Platform for Streaming Applications on FPGA. | Zhenyuan Ruan, Tong He, Bojie Li, Peipei Zhou, Jason Cong |
| 2018 | FPGA | FPGA-based LSTM Acceleration for Real-Time EEG Signal Processing: (Abstract Only). | Zhe Chen, Andrew Howe, Hugh T. Blair, Jason Cong |
| 2018 | FPGA | An Optimal Microarchitecture for Stencil Computation with Data Reuse and Fine-Grained Parallelism: (Abstract Only). | Yuze Chi, Peipei Zhou, Jason Cong |
| 2018 | FPGA | K-Flow: A Programming and Scheduling Framework to Optimize Dataflow Execution on CPU-FPGA Platforms: (Abstract Only). | Jason Cong, Zhenman Fang, Yao Hu, Di Wu |
| 2018 | FPGA | Understanding Performance Differences of FPGAs and GPUs: (Abtract Only). | Jason Cong, Zhenman Fang, Michael Lo, Hanrui Wang, Jingxian Xu, Shaochong Zhang |
| 2018 | FPGA | High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only). | Weikang Qiao, Jieqiong Du, Zhenman Fang, Libo Wang, Michael Lo, Mau-Chung Frank Chang, Jason Cong |
| 2018 | FPL | SMEM++: A Pipelined and Time-Multiplexed SMEM Seeding Accelerator for Genome Sequencing. | Jason Cong, Licheng Guo, Po-Tsang Huang, Peng Wei, Tianhe Yu |
| 2018 | HPCA | RC-NVM: Enabling Symmetric Row and Column Memory Accesses for In-memory Databases. | Peng Wang, Shuo Li, Guangyu Sun, Xiaoyang Wang, Yiran Chen, Hai Li, Jason Cong, Nong Xiao, Tao Zhang |
| 2018 | ICCAD | SODA: stencil with optimized dataflow architecture. | Yuze Chi, Jason Cong, Peng Wei, Peipei Zhou |
| 2018 | ICCAD | HLS-based optimization and design space exploration for applications with variable loop bounds. | Young-kyu Choi, Jason Cong |
| 2018 | ICCAD | PolySA: polyhedral-based systolic array auto-compilation. | Jason Cong, Jie Wang |
| 2018 | ICCAD | TGPA: tile-grained pipeline architecture for low latency CNN inference. | Xuechao Wei, Yun Liang, Xiuhong Li, Cody Hao Yu, Peng Zhang, Jason Cong |
| 2018 | ISLPED | CLINK: Compact LSTM Inference Kernel for Energy Efficient Neurofeedback Devices. | Zhe Chen, Andrew Howe, Hugh T. Blair, Jason Cong |
| 2018 | ISPASS | Doppio: I/O-Aware Performance Analysis, Modeling and Optimization for In-memory Computing Framework. | Peipei Zhou, Zhenyuan Ruan, Zhenman Fang, Megan Shand, David Roazen, Jason Cong |
| 2018 | MICCAI | Computed Tomography Image Enhancement Using 3D Convolutional Neural Network. | Meng Li, Shiwen Shen, Wen Gao, William Hsu, Jason Cong |
| 2017 | ASPDAC | FPGA-based accelerator for long short-term memory recurrent neural networks. | Yijin Guan, Zhihang Yuan, Guangyu Sun, Jason Cong |
| 2017 | ASPDAC | Throughput optimization for streaming applications on CPU-FPGA heterogeneous systems. | Xuechao Wei, Yun Liang, Tao Wang, Songwu Lu, Jason Cong |
| 2017 | DAC | Bandwidth Optimization Through On-Chip Memory Restructuring for HLS. | Jason Cong, Peng Wei, Cody Hao Yu, Peipei Zhou |
| 2017 | DAC | Automated Systolic Array Architecture Synthesis for High Throughput CNN Inference on FPGAs. | Xuechao Wei, Cody Hao Yu, Peng Zhang, Youxiang Chen, Yuxin Wang, Han Hu, Yun Liang, Jason Cong |
| 2017 | FCCM | HLScope: High-Level Performance Debugging for FPGA Designs. | Young Kyu Choi, Jason Cong |
| 2017 | FCCM | FP-DNN: An Automated Framework for Mapping Deep Neural Networks onto FPGAs with RTL-HLS Hybrid Templates. | Yijin Guan, Hao Liang, Ningyi Xu, Wenqiang Wang, Shaoshuai Shi, Xi Chen, Guangyu Sun, Wei Zhang, Jason Cong |
| 2017 | FPGA | CPU-FPGA Co-Optimization for Big Data Applications: A Case Study of In-Memory Samtool Sorting (Abstract Only). | Jason Cong, Zhenman Fang, Muhuan Huang, Libo Wang, Di Wu |
| 2017 | HPCA | Supporting Address Translation for Accelerator-Centric Architectures. | Yuchen Hao, Zhenman Fang, Glenn Reinman, Jason Cong |
| 2017 | ICASSP | A cache-based bandwidth optimized motion compensation architecture for video decoder. | Meng Li, Huizhu Jia, Xiaodong Xie, Jason Cong, Wen Gao |
| 2017 | ICCAD | HLScope+, : Fast and accurate performance estimation for FPGA HLS. | Young-kyu Choi, Peng Zhang, Peng Li, Jason Cong |
| 2016 | ASPDAC | A scalable communication-aware compilation flow for programmable accelerators. | Jason Cong, Hui Huang, Mohammad Ali Ghodrat |
| 2016 | CLOUD | Programming and Runtime Support to Blaze FPGA Accelerator Deployment at Datacenter Scale. | Muhuan Huang, Di Wu, Cody Hao Yu, Zhenman Fang, Matteo Interlandi, Tyson Condie, Jason Cong |
| 2016 | DAC | A quantitative analysis on microarchitectures of modern CPU-FPGA platforms. | Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei |
| 2016 | DAC | Invited - Heterogeneous datacenters: options and opportunities. | Jason Cong, Muhuan Huang, Di Wu, Cody Hao Yu |
| 2016 | FCCM | The SMEM Seeding Acceleration for DNA Sequence Alignment. | Mau-Chung Frank Chang, Yu-Ting Chen, Jason Cong, Po-Tsang Huang, Chun-Liang Kuo, Cody Hao Yu |
| 2016 | FCCM | When Spark Meets FPGAs: A Case Study for Next-Generation DNA Sequencing Acceleration. | Yu-Ting Chen, Jason Cong, Zhenman Fang, Jie Lei, Peng Wei |
| 2016 | FCCM | Energy Efficiency of Full Pipelining: A Case Study for Matrix Multiplication. | Peipei Zhou, Hyunseok Park, Zhenman Fang, Jason Cong, Andr DeHon |
| 2016 | FPGA | ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architecture (Abstact Only). | Yu-Ting Chen, Jason Cong, Zhenman Fang, Peipei Zhou |
| 2016 | FPGA | A High-throughput Architecture for Lossless Decompression on FPGA Designed Using HLS (Abstract Only). | Jie Lei, Yu-Ting Chen, Yunsong Li, Jason Cong |
| 2016 | ICCAD | Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks. | Chen Zhang, Zhenman Fang, Peipei Zhou, Peichen Pan, Jason Cong |
| 2016 | ISLPED | Software Infrastructure for Enabling FPGA-Based Accelerations in Data Centers: Invited Paper. | Jason Cong, Muhuan Huang, Peichen Pan, Di Wu, Peng Zhang |
| 2016 | ISLPED | Energy-Efficient CNN Implementation on a Deeply Pipelined FPGA Cluster. | Chen Zhang, Di Wu, Jiayu Sun, Guangyu Sun, Guojie Luo, Jason Cong |
| 2015 | DAC | On-chip interconnection network for accelerator-rich architectures. | Jason Cong, Michael Gill, Yuchen Hao, Glenn Reinman, Bo Yuan |
| 2015 | DAC | CMOST: a system-level FPGA compilation framework. | Peng Zhang, Muhuan Huang, Bingjun Xiao, Hui Huang, Jason Cong |
| 2015 | FCCM | A Novel High-Throughput Acceleration Engine for Read Alignment. | Yu-Ting Chen, Jason Cong, Jie Lei, Peng Wei |
| 2015 | FPGA | Resource-Aware Throughput Optimization for High-Level Synthesis. | Peng Li, Peng Zhang, Louis-Nol Pouchet, Jason Cong |
| 2015 | FPGA | Growing a Healthy FPGA Ecosystem. | John Lockwood, Michael Adler, Dan Mansur, Derek Chiou, Mike Strickland, Jason Cong, Steve Teig |
| 2015 | FPGA | Customizable and High Performance Matrix Multiplication Kernel on FPGA (Abstract Only). | Jie Wang, Jason Cong |
| 2015 | FPGA | Optimizing FPGA-based Accelerator Design for Deep Convolutional Neural Networks. | Chen Zhang, Peng Li, Guangyu Sun, Yijin Guan, Bingjun Xiao, Jason Cong |
| 2015 | FPGA | FPGA Acceleration for Simultaneous Image Reconstruction and Segmentation based on the Mumford-Shah Regularization (Abstract Only). | Wentai Zhang, Li Shen, Thomas Page, Guojie Luo, Peng Li, Peter Maa, Ming Jiang, Jason Cong |
| 2015 | ICCAD | PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration. | Jason Cong, Zhenman Fang, Michael Gill, Glenn Reinman |
| 2015 | ICCAD | Impact of Loop Transformations on Software Reliability. | Jason Cong, Cody Hao Yu |
| 2015 | ISLPED | Interconnect synthesis of heterogeneous accelerators in a shared memory architecture. | Yu-Ting Chen, Jason Cong |
| 2015 | ISPASS | ARACompiler: a prototyping flow and evaluation framework for accelerator-rich architectures. | Yu-Ting Chen, Jason Cong, Bingjun Xiao |
| 2014 | DAC | Accelerator-Rich Architectures: Opportunities and Progresses. | Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Karthik Gururaj, Glenn Reinman |
| 2014 | DAC | An Optimal Microarchitecture for Stencil Computation Acceleration Based on Non-Uniform Partitioning of Data Reuse Buffers. | Jason Cong, Peng Li, Bingjun Xiao, Peng Zhang |
| 2014 | EuroSys | An efficient design and implementation of LSM-tree based key-value store on open-channel SSD. | Peng Wang, Guangyu Sun, Song Jiang, Jian Ouyang, Shiding Lin, Chen Zhang, Jason Cong |
| 2014 | FCCM | FPGA Implementation of EM Algorithm for 3D CT Reconstruction. | Young Kyu Choi, Jason Cong, Di Wu |
| 2014 | FCCM | A Fully Pipelined and Dynamically Composable Architecture of CGRA. | Jason Cong, Hui Huang, Chiyuan Ma, Bingjun Xiao, Peipei Zhou |
| 2014 | FCCM | FPGA Acceleration for Simultaneous Medical Image Reconstruction and Segmentation. | Peng Li, Thomas Page, Guojie Luo, Wentai Zhang, Pei Wang, Peng Zhang, Peter Maass, Ming Jiang, Jason Cong |
| 2014 | FPGA | Combining computation and communication optimizations in system synthesis for streaming applications. | Jason Cong, Muhuan Huang, Peng Zhang |
| 2014 | FPGA | EPEE: an efficient PCIe communication library with easy-host-integration property for FPGA accelerators (abstract only). | Jian Gong, Jiahua Chen, Haoyang Wu, Fan Ye, Songwu Lu, Jason Cong, Tao Wang |
| 2014 | FPGA | Transformations for throughput optimization in high-level synthesis (abstract only). | Peng Li, Louis-Nol Pouchet, Deming Chen, Jason Cong |
| 2014 | FPGA | Theory and algorithm for generalized memory partitioning in high-level synthesis. | Yuxin Wang, Peng Li, Jason Cong |
| 2014 | FPL | An efficient and flexible host-FPGA PCIe communication library. | Jian Gong, Tao Wang, Jiahua Chen, Haoyang Wu, Fan Ye, Songwu Lu, Jason Cong |
| 2014 | FPL | A scalable, high-performance customized priority queue. | Muhuan Huang, Kevin Lim, Jason Cong |
| 2014 | ICANN | Minimizing Computation in Convolutional Neural Networks. | Jason Cong, Bingjun Xiao |
| 2014 | ISLPED | Accelerator-rich architectures: from single-chip to datacenters. | Jason Cong |
| 2013 | ASPDAC | Optimizing routability in large-scale mixed-size placement. | Jason Cong, Guojie Luo, Kalliopi Tsota, Bingjun Xiao |
| 2013 | DAC | Defect tolerance in nanodevice-based programmable interconnects: utilization beyond avoidance. | Jason Cong, Bingjun Xiao |
| 2013 | DAC | Throughput-oriented kernel porting onto FPGAs. | Alexandros Papakonstantinou, Deming Chen, Wen-mei W. Hwu, Jason Cong, Yun Liang |
| 2013 | DAC | Memory partitioning for multidimensional arrays in high-level synthesis. | Yuxin Wang, Peng Li, Peng Zhang, Chen Zhang, Jason Cong |
| 2013 | FCCM | FPGA Simulation Engine for Customized Construction of Neural Microcircuit. | Jason Cong, Hugh T. Blair, Di Wu |
| 2013 | FPGA | Are FPGAs suffering from the innovator's dilemna? | Vaughn Betz, Jason Cong |
| 2013 | FPGA | Architecture support for custom instructions with memory operations. | Jason Cong, Karthik Gururaj |
| 2013 | FPGA | Efficient system-level mapping from streaming applications to FPGAs (abstract only). | Jason Cong, Muhuan Huang, Peng Zhang |
| 2013 | FPGA | Defect recovery in nanodevice-based programmable interconnects (abstract only). | Jason Cong, Bingjun Xiao |
| 2013 | FPGA | Polyhedral-based data reuse optimization for configurable computing. | Louis-Nol Pouchet, Peng Zhang, P. Sadayappan, Jason Cong |
| 2013 | FPGA | Automatic multidimensional memory partitioning for FPGA-based accelerators (abstract only). | Yuxin Wang, Peng Li, Peng Zhang, Chen Zhang, Jason Cong |
| 2013 | FPGA | Improving high level synthesis optimization opportunity through polyhedral transformations. | Wei Zuo, Yun Liang, Peng Li, Kyle Rupnow, Deming Chen, Jason Cong |
| 2013 | ICCAD | FPGA simulation engine for customized construction of neural microcircuits. | Hugh T. Blair, Jason Cong, Di Wu |
| 2013 | ICCAD | Optimization of interconnects between accelerators and shared memories in dark silicon. | Jason Cong, Bingjun Xiao |
| 2013 | ICCD | Accelerator-rich CMPs: From concept to real hardware. | Yu-Ting Chen, Jason Cong, Mohammad Ali Ghodrat, Muhuan Huang, Chunyue Liu, Bingjun Xiao, Yi Zou |
| 2013 | ISCAS | Designing scratchpad memory architecture with emerging STT-RAM memory technologies. | Peng Wang, Guangyu Sun, Tao Wang, Yuan Xie, Jason Cong |
| 2013 | ISLPED | Energy-efficient computing using adaptive table lookup based on nonvolatile memories. | Jason Cong, Milos D. Ercegovac, Muhuan Huang, Sen Li, Bingjun Xiao |
| 2013 | ISLPED | Composable accelerator-rich microprocessor enhanced for adaptivity and longevity. | Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Hui Huang, Glenn Reinman |
| 2012 | ASPDAC | Platform characterization for Domain-Specific Computing. | Alex A. T. Bui, Kwang-Ting Cheng, Jason Cong, Luminita A. Vese, Yi-Chu Wang, Bo Yuan, Yi Zou |
| 2012 | ASPDAC | Compilation and architecture support for customized vector instruction extension. | Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Hui Huang, Bin Liu, Raghu Prabhakar, Glenn Reinman, Marco Vitanza |
| 2012 | ASPDAC | An integrated and automated memory optimization flow for FPGA behavioral synthesis. | Yuxin Wang, Peng Zhang, Xu Cheng, Jason Cong |
| 2012 | DAC | Architecture support for accelerator-rich CMPs. | Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Glenn Reinman |
| 2012 | DAC | A metric for layout-friendly microarchitecture optimization in high-level synthesis. | Jason Cong, Bin Liu |
| 2012 | DAC | Optimizing memory hierarchy allocation with loop transformations for high-level synthesis. | Jason Cong, Peng Zhang, Yi Zou |
| 2012 | DATE | Dynamically reconfigurable hybrid cache: An energy-efficient last-level cache design. | Yu-Ting Chen, Jason Cong, Hui Huang, Bin Liu, Chunyue Liu, Miodrag Potkonjak, Glenn Reinman |
| 2012 | DATE | Combining module selection and replication for throughput-driven streaming programs. | Jason Cong, Muhuan Huang, Bin Liu, Peng Zhang, Yi Zou |
| 2012 | FPGA | FPGA-accelerated 3D reconstruction using compressive sensing. | Jianwen Chen, Jason Cong, Ming Yan, Yi Zou |
| 2012 | FPGA | FPGA-RR: an enhanced FPGA architecture with RRAM-based reconfigurable interconnects (abstract only). | Jason Cong, Bingjun Xiao |
| 2012 | ICCAD | Memory partitioning and scheduling co-optimization in behavioral synthesis. | Peng Li, Yuxin Wang, Peng Zhang, Guojie Luo, Tao Wang, Jason Cong |
| 2012 | ISLPED | Static and dynamic co-optimizations for blocks mapping in hybrid caches. | Yu-Ting Chen, Jason Cong, Hui Huang, Chunyue Liu, Raghu Prabhakar, Glenn Reinman |
| 2012 | ISLPED | CHARM: a composable heterogeneous accelerator-rich microprocessor. | Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, Glenn Reinman |
| 2012 | ISLPED | BiN: a buffer-in-NUCA scheme for accelerator-rich CMPs. | Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Chunyue Liu, Glenn Reinman |
| 2012 | ISLPED | Energy-efficient scheduling on heterogeneous multi-core architectures. | Jason Cong, Bo Yuan |
| 2011 | ASPDAC | Rethinking thermal via planning with timing-power-temperature dependence for 3D ICs. | Kan Wang, Yuchun Ma, Sheqin Dong, Yu Wang, Xianlong Hong, Jason Cong |
| 2011 | DAC | A reuse-aware prefetching scheme for scratchpad memory. | Jason Cong, Hui Huang, Chunyue Liu, Yi Zou |
| 2011 | DAC | Thermal-aware cell and through-silicon-via co-placement for 3D ICs. | Jason Cong, Guojie Luo, Yiyu Shi |
| 2011 | FCCM | Multilevel Granularity Parallelism Synthesis on FPGAs. | Alexandros Papakonstantinou, Yun Liang, John A. Stratton, Karthik Gururaj, Deming Chen, Wen-mei W. Hwu, Jason Cong |
| 2011 | FPGA | Resolving implicit barrier synchronizations in FPGA HLS (abstract only). | Jason Cong, Yi Zou |
| 2011 | FPL | Accelerating Fluid Registration Algorithm on Multi-FPGA Platforms. | Jason Cong, Muhuan Huang, Yi Zou |
| 2011 | ICCAD | Assuring application-level correctness against soft errors. | Jason Cong, Karthik Gururaj |
| 2011 | ICCAD | ATree-based topology synthesis for on-chip network. | Jason Cong, Yuhui Huang, Bo Yuan |
| 2011 | ICCAD | Combined loop transformation and hierarchy allocation for data reuse optimization. | Jason Cong, Peng Zhang, Yi Zou |
| 2011 | ICCD | The DIMM tree architecture: A high bandwidth and scalable memory system. | Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, M. Frank Chang |
| 2011 | ISCAS | A unified optimization framework for simultaneous gate sizing and placement under density constraints. | Jason Cong, John Lee, Guojie Luo |
| 2011 | ISLPED | An energy-efficient adaptive hybrid cache. | Jason Cong, Karthik Gururaj, Hui Huang, Chunyue Liu, Glenn Reinman, Yi Zou |
| 2011 | ISVC | EM+TV Based Reconstruction for Cone-Beam CT with Reduced Radiation. | Ming Yan, Jianwen Chen, Luminita A. Vese, John D. Villasenor, Alex A. T. Bui, Jason Cong |
| 2010 | DAC | ACES: application-specific cycle elimination and splitting for deadlock-free routing on irregular network-on-chip. | Jason Cong, Chunyue Liu, Glenn Reinman |
| 2010 | DAC | LUT-based FPGA technology mapping for reliability. | Jason Cong, Kirill Minkovich |
| 2010 | DATE | A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis. | Jason Cong, Hui Huang, Wei Jiang |
| 2010 | DATE | Coordinated resource optimization in behavioral synthesis. | Jason Cong, Bin Liu, Junjuan Xu |
| 2010 | FCCM | A Comparative Study on the Architecture Templates for Dynamic Nested Loops. | Jason Cong, Yi Zou |
| 2010 | FPGA | Accelerating Monte Carlo based SSTA using FPGA. | Jason Cong, Karthik Gururaj, Wei Jiang, Bin Liu, Kirill Minkovich, Bo Yuan, Yi Zou |
| 2010 | FPGA | LUT-based FPGA technology mapping for reliability (abstract only). | Jason Cong, Kirill Minkovich |
| 2010 | FPGA | Bit-level optimization for high-level synthesis and FPGA-based acceleration. | Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan, Xianhua Liu, Xu Cheng, Jason Cong |
| 2009 | ASPDAC | On the futility of statistical power optimization. | Jason Cong, Puneet Gupta, John Lee |
| 2009 | ASPDAC | A multilevel analytical placement for 3D ICs. | Jason Cong, Guojie Luo |
| 2009 | DAC | Moore's Law: another casualty of the financial meltdown? | Jason Cong, N. S. Nagaraj, Ruchir Puri, William H. Joyner, Jeff Burns, Moshe Gavrielov, Riko Radojcic, Peter Rickert, Hans Stork |
| 2009 | DAC | From milliwatts to megawatts: system level power challenge. | Ruchir Puri, Eshel Haritan, Stan Krolikoski, Jason Cong, Tim Kogel, Bradley D. McCredie, John Shen, Andrs Takach |
| 2009 | DATE | Energy efficient multiprocessor task scheduling under input-dependent variation. | Jason Cong, Karthik Gururaj |
| 2009 | FCCM | Evaluation of Static Analysis Techniques for Fixed-Point Precision Optimization. | Jason Cong, Karthik Gururaj, Bin Liu, Chunyue Liu, Zhiru Zhang, Sheng Zhou, Yi Zou |
| 2009 | FPGA | Synthesis of reconfigurable high-performance multicore systems. | Jason Cong, Karthik Gururaj, Guoling Han |
| 2009 | FPGA | Revisiting bitwidth optimizations. | Jason Cong, Karthik Gururaj, Bin Liu, Chunyue Liu, Yi Zou, Zhiru Zhang, Sheng Zhou |
| 2009 | FPL | Customizable domain-specific computing. | Jason Cong |
| 2009 | ICCAD | A rigorous framework for convergent net weighting schemes in timing-driven placement. | Tony F. Chan, Jason Cong, Eric Radke |
| 2009 | ICCAD | Automatic memory partitioning and scheduling for throughput and power optimization. | Jason Cong, Wei Jiang, Bin Liu, Yi Zou |
| 2009 | ICCAD | Scheduling with soft constraints. | Jason Cong, Bin Liu, Zhiru Zhang |
| 2009 | ICCAD | Parallel multi-level analytical global placement on graphics processing units. | Jason Cong, Yi Zou |
| 2009 | ICS | High-performance CUDA kernel execution on FPGAs. | Alexandros Papakonstantinou, Karthik Gururaj, John A. Stratton, Deming Chen, Jason Cong, Wen-mei W. Hwu |
| 2009 | ISLPED | Behavior-level observability don't-cares and application to low-power behavioral synthesis. | Jason Cong, Bin Liu, Zhiru Zhang |
| 2009 | MOBICOM | A scalable micro wireless interconnect structure for CMPs. | Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, Songwu Lu, M. Frank Chang, Chuanxiong Guo, Glenn Reinman, Chunyi Peng, Mishali Naik, Lixia Zhang, Jason Cong |
| 2008 | ASPDAC | Behavioral synthesis with activating unused flip-flops for reducing glitch power in FPGA. | Cheng-Tao Hsieh, Jason Cong, Zhiru Zhang, Shih-Chieh Chang |
| 2008 | ASPDAC | Scheduling with integer time budgeting for low-power optimization. | Wei Jiang, Zhiru Zhang, Miodrag Potkonjak, Jason Cong |
| 2008 | ASPDAC | LP based white space redistribution for thermal via planning and performance optimization in 3D ICs. | Xin Li, Yuchun Ma, Xianlong Hong, Sheqin Dong, Jason Cong |
| 2008 | DATE | Simultaneous FU and Register Binding Based on Network Flow Method. | Jason Cong, Junjuan Xu |
| 2008 | FPGA | Pattern-based behavior synthesis for FPGA resource reduction. | Jason Cong, Wei Jiang |
| 2008 | FPGA | Lithographic aerial image simulation with FPGA-based hardwareacceleration. | Jason Cong, Yi Zou |
| 2008 | FPGA | Mapping for better than worst-case delays in LUT-based FPGA designs. | Kirill Minkovich, Jason Cong |
| 2008 | HPCA | CMP network-on-chip overlaid with multi-band RF-interconnect. | M. Frank Chang, Jason Cong, Adam Kaplan, Mishali Naik, Glenn Reinman, Eran Socher, Sai-Wang Tam |
| 2008 | ICCAD | Fault tolerant placement and defect reconfiguration for nano-FPGAs. | Amit Agarwal, Jason Cong, Brian Tagiku |
| 2008 | ICCAD | MC-Sim: an efficient simulation tool for MPSoC designs. | Jason Cong, Karthik Gururaj, Guoling Han, Adam Kaplan, Mishali Naik, Glenn Reinman |
| 2008 | MICRO | Power reduction of CMP communication networks via RF-interconnects. | M.-C. Frank Chang, Jason Cong, Adam Kaplan, Chunyue Liu, Mishali Naik, Jagannath Premkumar, Glenn Reinman, Eran Socher, Sai-Wang Tam |
| 2007 | ASPDAC | High-Level Power Estimation and Low-Power Design Space Exploration for FPGAs. | Deming Chen, Jason Cong, Yiping Fan, Zhiru Zhang |
| 2007 | ASPDAC | Thermal-Aware 3D IC Placement Via Transformation. | Jason Cong, Guojie Luo, Jie Wei, Yan Zhang |
| 2007 | ASPDAC | Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning. | Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong, Glenn Reinman, Sheqin Dong, Qiang Zhou |
| 2007 | FPGA | Synthesis of an application-specific soft multiprocessor system. | Jason Cong, Guoling Han, Wei Jiang |
| 2007 | FPGA | Improved SAT-based Boolean matching using implicants for LUT-based FPGAs. | Jason Cong, Kirill Minkovich |
| 2007 | ICCD | Fine grain 3D integration for microarchitecture design through cube packing exploration. | Yongxiang Liu, Yuchun Ma, Eren Kursun, Glenn Reinman, Jason Cong |
| 2006 | ASPDAC | An automated design flow for 3D microarchitecture evaluation. | Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Reinman, Jie Wei, Yan Zhang |
| 2006 | ASPDAC | A robust detailed placement for mixed-size IC designs. | Jason Cong, Min Xie |
| 2006 | DAC | Optimality study of resource binding with multi-Vdds. | Deming Chen, Jason Cong, Yiping Fan, Junjuan Xu |
| 2006 | DAC | Behavior and communication co-optimization for systems with sequential communication media. | Jason Cong, Yiping Fan, Guoling Han, Wei Jiang, Zhiru Zhang |
| 2006 | DAC | An efficient and versatile scheduling algorithm based on SDC formulation. | Jason Cong, Zhiru Zhang |
| 2006 | DAC | Optimal simultaneous mapping and clustering for FPGA delay optimization. | Joey Y. Lin, Deming Chen, Jason Cong |
| 2006 | FPGA | Optimality study of logic synthesis for LUT-based FPGAs. | Jason Cong, Kirill Minkovich |
| 2006 | ICCAD | Platform-based resource binding using a distributed register-file microarchitecture. | Jason Cong, Yiping Fan, Wei Jiang |
| 2005 | ASPDAC | Optimal module and voltage assignment for low-power. | Deming Chen, Jason Cong, Junjuan Xu |
| 2005 | ASPDAC | Bitwidth-aware scheduling and binding in high-level synthesis. | Jason Cong, Yiping Fan, Guoling Han, Yizhou Lin, Junjuan Xu, Zhiru Zhang, Xu Cheng |
| 2005 | ASPDAC | Are we ready for system-level synthesis? | Jason Cong, Tony Ma, Ivo Bolsens, Phil Moorby, Jan M. Rabaey, John Sanguinetti, Kazutoshi Wakabayashi, Yoshi Watanabe |
| 2005 | ASPDAC | Fast floorplanning by look-ahead enabled recursive bipartitioning. | Jason Cong, Michail Romesis, Joseph R. Shinnerl |
| 2005 | ASPDAC | Thermal-driven multilevel routing for 3-D ICs. | Jason Cong, Yan Zhang |
| 2005 | ASPDAC | Microarchitecture evaluation with floorplanning and interconnect pipelining. | Ashok Jagannathan, Hannah Honghua Yang, Kris Konigsfeld, Dan Milliron, Mosur Mohan, Michail Romesis, Glenn Reinman, Jason Cong |
| 2005 | FPGA | Simultaneous timing-driven placement and duplication. | Gang Chen, Jason Cong |
| 2005 | FPGA | Instruction set extension with shadow registers for configurable processors. | Jason Cong, Yiping Fan, Guoling Han, Ashok Jagannathan, Glenn Reinman, Zhiru Zhang |
| 2005 | ICCAD | Architecture and compilation for data bandwidth improvement in configurable embedded processors. | Jason Cong, Guoling Han, Zhiru Zhang |
| 2005 | ICCAD | Robust mixed-size placement under tight white-space constraints. | Jason Cong, Michail Romesis, Joseph R. Shinnerl |
| 2005 | ICCAD | Thermal via planning for 3-D ICs. | Jason Cong, Yan Zhang |
| 2005 | ISCAS | Lower-bound estimation for multi-bitwidth scheduling. | Junjuan Xu, Jason Cong, Xu Cheng |
| 2005 | ISLPED | Understanding the energy efficiency of SMT and CMP with multiclustering. | Jason Cong, Ashok Jagannathan, Glenn Reinman, Yuval Tamir |
| 2004 | ASPDAC | Register binding and port assignment for multiplexer optimization. | Deming Chen, Jason Cong |
| 2004 | DAC | Architecture-level synthesis for automatic interconnect pipelining. | Jason Cong, Yiping Fan, Zhiru Zhang |
| 2004 | DAC | What happened to ASIC?: Go (recon)figure? | Nitin Deo, Behrooz Zahiri, Ivo Bolsens, Jason Cong, Bhusan Gupta, Philip Lopresti, Christopher B. Reynolds, Chris Rowen, Ray Simar |
| 2004 | FPGA | Low-power technology mapping for FPGA architectures with dual supply voltages. | Deming Chen, Jason Cong, Fei Li, Lei He |
| 2004 | FPGA | Application-specific instruction generation for configurable processor architectures. | Jason Cong, Yiping Fan, Guoling Han, Zhiru Zhang |
| 2004 | FPGA | Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics. | Fei Li, Yan Lin, Lei He, Jason Cong |
| 2004 | FPL | Simultaneous Timing Driven Clustering and Placement for FPGAs. | Gang Chen, Jason Cong |
| 2004 | ICCAD | DAOmap: a depth-optimal area optimization mapping algorithm for FPGA designs. | Deming Chen, Jason Cong |
| 2004 | ICCAD | A thermal-driven floorplanning algorithm for 3D ICs. | Jason Cong, Jie Wei, Yan Zhang |
| 2004 | ICCAD | Routability-driven placement and white space allocation. | Chen Li, Min Xie, Cheng-Kok Koh, Jason Cong, Patrick H. Madden |
| 2004 | ISLPED | Delay optimal low-power circuit clustering for FPGAs with dual supply voltages. | Deming Chen, Jason Cong |
| 2003 | ASPDAC | Optimality and scalability study of existing placement algorithms. | Chin-Chih Chang, Jason Cong, Min Xie |
| 2003 | ASPDAC | Multi-level placement for large-scale mixed-size IC designs. | Chin-Chih Chang, Jason Cong, Xin Yuan |
| 2003 | DAC | Microarchitecture evaluation with physical planning. | Jason Cong, Ashok Jagannathan, Glenn Reinman, Michail Romesis |
| 2003 | DAC | Multilevel global placement with retiming. | Jason Cong, Xin Yuan |
| 2003 | FPGA | Architecture evaluation for power-efficient FPGAs. | Fei Li, Deming Chen, Lei He, Jason Cong |
| 2003 | ICCAD | An Enhanced Multilevel Algorithm for Circuit Placement. | Tony F. Chan, Jason Cong, Tim Kong, Joseph R. Shinnerl, Kenton Sze |
| 2003 | ICCAD | Architectural Synthesis Integrated with Global Placement for Multi-Cycle Communication. | Jason Cong, Yiping Fan, Guoling Han, Xun Yang, Zhiru Zhang |
| 2003 | ICCAD | Large-Scale Circuit Placement: Gap and Promise. | Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie, Xin Yuan |
| 2003 | ICCAD | Optimality and Stability Study of Timing-Driven Placement Algorithms. | Jason Cong, Michail Romesis, Min Xie |
| 2003 | ICCAD | Gradual Relaxation Techniques with Applications to Behavioral Synthesis. | Zhiru Zhang, Yiping Fan, Miodrag Potkonjak, Jason Cong |
| 2003 | ISLPED | Low-power high-level synthesis for FPGA architectures. | Deming Chen, Jason Cong, Yiping Fan |
| 2002 | FPGA | SPFD-based global rewiring. | Jason Cong, Yizhou Lin, Wangning Long |
| 2002 | ICCAD | A new enhanced SPFD rewiring algorithm. | Jason Cong, Joey Y. Lin, Wangning Long |
| 2002 | ICCAD | An enhanced multilevel routing system. | Jason Cong, Min Xie, Yan Zhang |
| 2001 | ASPDAC | Improved crosstalk modeling for noise constrained interconnect optimization. | Jason Cong, David Zhigang Pan, Prasanna V. Srinivas |
| 2001 | DAC | Performance-Driven Multi-Level Clustering with Application to Hierarchical FPGA Mapping. | Jason Cong, Michail Romesis |