Scalable Video Coding Deblocking Filter FPGA and ASIC Implementation Using High-Level Synthesis Methodology.
Pedro P. Carballo, Omar Espino, Romn Neris, Pedro Hernandez-Fernandez, Tomasz Szydzik, Antonio Nez
Browse the full DSD paper archive.
Pedro P. Carballo, Omar Espino, Romn Neris, Pedro Hernandez-Fernandez, Tomasz Szydzik, Antonio Nez
Browse the full DSD paper archive.