Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
FPGA
/
Paper
A configurable architecture to limit wakeup current in dynamically-controlled power-gated FPGAs.
Assem A. M. Bsoul
,
Steven J. E. Wilton
Venue
A
FPGA
Year
2012
Proceedings
FPGA
DBLP record
conf/fpga/BsoulW12 ↗
Browse the full
FPGA paper archive
.