COGRE: A Configuration Memory Reduced Reconfigurable Logic Cell Architecture for Area Minimization.
Yasuhiro Okamoto, Yoshihiro Ichinomiya, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi
Browse the full FPL paper archive.
Yasuhiro Okamoto, Yoshihiro Ichinomiya, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi
Browse the full FPL paper archive.