Motoki Amagasaki
Publication record assembled from the DBLP archive of ranked conferences.
Papers indexed
15
Venues
5
Active years
2007–2020
Best venue rank
B
Where they publish
Papers
15 indexed papers, newest first.
| Year | Venue | Title | Authors |
|---|---|---|---|
| 2020 | Tencon | Image Search System Based on Feature Vectors of Convolutional Neural Network. | Mery Diana, Motoki Amagasaki, Masahiro Iida |
| 2014 | FPL | A logic cell architecture exploiting the shannon expansion for the reduction of configuration memory. | Qian Zhao, Kyosei Yanagida, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2013 | FPGA | A novel FPGA design framework with VLSI post-routing performance analysis (abstract only). | Qian Zhao, Kazuki Inoue, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2013 | FPL | Defect-robust FPGA architectures for intellectual property cores in system LSI. | Motoki Amagasaki, Kazuki Inoue, Qian Zhao, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2013 | FPL | An automatic FPGA design and implementation framework. | Qian Zhao, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2012 | FCCM | Designing Flexible Reconfigurable Regions to Relocate Partial Bitstreams. | Yoshihiro Ichinomiya, Sadaki Usagawa, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2012 | FPL | Fault detection and avoidance of FPGA in various granularities. | Kazuki Inoue, Yuki Nishitani, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2012 | ICA3PP | Fault Recovery Technique for TMR Softcore Processor System Using Partial Reconfiguration. | Makoto Fujino, Hiroki Tanaka, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Masahiro Iida, Toshinori Sueyoshi |
| 2012 | ICA3PP | A Bitstream Relocation Technique to Improve Flexibility of Partial Reconfiguration. | Yoshihiro Ichinomiya, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2011 | FPL | An Easily Testable Routing Architecture and Efficient Test Technique. | Kazuki Inoue, Hiroki Yosho, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi |
| 2010 | FCCM | Improving the Robustness of a Softcore Processor against SEUs by Using TMR and Partial Reconfiguration. | Yoshihiro Ichinomiya, Shiro Tanoue, Motoki Amagasaki, Masahiro Iida, Morihiro Kuga, Toshinori Sueyoshi |
| 2010 | FPL | First Prototype of a Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells. | Masahiro Koga, Masahiro Iida, Motoki Amagasaki, Yoshinobu Ichida, Mitsuro Saji, Jun Iida, Toshinori Sueyoshi |
| 2010 | FPL | COGRE: A Configuration Memory Reduced Reconfigurable Logic Cell Architecture for Area Minimization. | Yasuhiro Okamoto, Yoshihiro Ichinomiya, Motoki Amagasaki, Masahiro Iida, Toshinori Sueyoshi |
| 2009 | FPL | A novel states recovery technique for the TMR softcore processor. | Shiro Tanoue, Tomoyuki Ishida, Yoshihiro Ichinomiya, Motoki Amagasaki, Morihiro Kuga, Toshinori Sueyoshi |
| 2007 | FPL | A Variable Grain Logic Cell Architecture for Reconfigurable Logic Cores. | Motoki Amagasaki, Ryoichi Yamaguchi, Kazunori Matsuyama, Masahiro Iida, Toshinori Sueyoshi |