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PD Constraint-aware Physical/Logical Topology Co-Design for Network on Wafer.

Qize Yang, Taiquan Wei, Sihan Guan, Chengran Li, Haoran Shang, Jinyi Deng, Huizheng Wang, Chao Li, Lei Wang, Yan Zhang, Shouyi Yin, Yang Hu

VenueA*ISCA
Year2025
ProceedingsISCA

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