A 5.2mW all-digital fast-lock self-calibrated multiphase delay-locked loop.
Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, Wei Hwang
Browse the full ISCAS paper archive.
Li-Pu Chuang, Ming-Hung Chang, Po-Tsang Huang, Chih-Hao Kan, Wei Hwang
Browse the full ISCAS paper archive.