Energy-delay efficient asynchronous-logic 1616-bit pipelined multiplier based on Sense Amplifier-Based Pass Transistor Logic.
Weng-Geng Ho, Kwen-Siong Chong, Tong Lin, Bah-Hwee Gwee, Joseph S. Chang
Browse the full ISCAS paper archive.
Weng-Geng Ho, Kwen-Siong Chong, Tong Lin, Bah-Hwee Gwee, Joseph S. Chang
Browse the full ISCAS paper archive.