A 83.7% Resource Reduced FPGA-based Wired-Logic DNN Processor by Using Mixed-Precision Module Embedding Into Non-Linear Function LUT.
Yuxuan Pan, Mototsugu Hamada, Atsutake Kosuge
Browse the full ISCAS paper archive.
Yuxuan Pan, Mototsugu Hamada, Atsutake Kosuge
Browse the full ISCAS paper archive.