High-speed low-power logic gates using floating gates.
Esther Rodrguez-Villegas, Jos M. Quintana, Maria J. Avedillo, Adoracin Rueda
Browse the full ISCAS paper archive.
Esther Rodrguez-Villegas, Jos M. Quintana, Maria J. Avedillo, Adoracin Rueda
Browse the full ISCAS paper archive.