Design of STR level converters for SoCs using the multi-island dual-VDD design technique.
Jinn-Shyan Wang, Yu-Juey Chang, Chingwei Yeh, Yuan-Hua Chu
Browse the full ISCAS paper archive.
Jinn-Shyan Wang, Yu-Juey Chang, Chingwei Yeh, Yuan-Hua Chu
Browse the full ISCAS paper archive.