Selectively clocked skewed logic (SCSL): low-power logic style for high-performance applications.
Naran Sirisantana, Aiqun Cao, Shawn Davidson, Cheng-Kok Koh, Kaushik Roy
Browse the full ISLPED paper archive.
Naran Sirisantana, Aiqun Cao, Shawn Davidson, Cheng-Kok Koh, Kaushik Roy
Browse the full ISLPED paper archive.