BIST-RM: BIST-assisted reliability management of SoCs using on-chip clock sweeping and machine learning.
Mehdi Sadi, Gustavo K. Contreras, Dat Tran, Jifeng Chen, LeRoy Winemberg, Mark Tehranipoor
Browse the full ITC paper archive.
Mehdi Sadi, Gustavo K. Contreras, Dat Tran, Jifeng Chen, LeRoy Winemberg, Mark Tehranipoor
Browse the full ITC paper archive.