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Paper
LATCHECK: A Latchup Checker for VLSI Layouts.
Aditya Agrawal
,
P. V. Srinivas
,
Gade Sreenivas
,
Uttiya Dasgupta
Venue
National
VLSID
Year
1993
Proceedings
VLSI Design
DBLP record
conf/vlsid/AgrawalSSD93 ↗
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