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Aditya Agrawal

Publication record assembled from the DBLP archive of ranked conferences.

Papers indexed

18

Venues

10

Active years

1993–2025

Best venue rank

A*

Where they publish

Papers

18 indexed papers, newest first.

YearVenueTitleAuthors
2025GLOBECOMProof-of-Work Assisted Jammer Evasion in LoRaWAN.Sourav Solanki, Sayan Sahu, Keshav Gaur, Sagar Narendra Solanki, Aditya Agrawal, Jay Dave
2024ICLRLarge Content And Behavior Models To Understand, Simulate, And Optimize Content And Behavior.Ashmit Khandelwal, Aditya Agrawal, Aanisha Bhattacharyya, Yaman Kumar, Somesh Singh, Uttaran Bhattacharya, Ishita Dasgupta, Stefano Petrangeli, Rajiv Ratn Shah, Changyou Chen, Balaji Krishnamurthy
2023EMNLPCOVID-19 Vaccine Misinformation in Middle Income Countries.Jongin Kim, Byeo Bak, Aditya Agrawal, Jiaxi Wu, Veronika J. Wirtz, Traci Hong, Derry Wijaya
2018SIGMETRICSWhat Your DRAM Power Models Are Not Telling You: Lessons from a Detailed Experimental Study.Saugata Ghose, Abdullah Giray Yagliki, Raghav Gupta, Donghyuk Lee, Kais Kudrolli, William X. Liu, Hasan Hassan, Kevin K. Chang, Niladrish Chatterjee, Aditya Agrawal, Mike O'Connor, Onur Mutlu
2017MICROXylem: enhancing vertical thermal conduction in 3D processor-memory stacks.Aditya Agrawal, Josep Torrellas, Sachin Idgunji
2017MICROFine-grained DRAM: energy-efficient DRAM for extreme bandwidth systems.Mike O'Connor, Niladrish Chatterjee, Donghyuk Lee, John M. Wilson, Aditya Agrawal, Stephen W. Keckler, William J. Dally
2017SIGMETRICSUnderstanding Reduced-Voltage Operation in Modern DRAM Devices: Experimental Characterization, Analysis, and Mechanisms.Kevin K. Chang, Abdullah Giray Yagliki, Saugata Ghose, Aditya Agrawal, Niladrish Chatterjee, Abhijith Kashyap, Donghyuk Lee, Mike O'Connor, Hasan Hassan, Onur Mutlu
2016HPCAScalCore: Designing a core for voltage scalability.Bhargava Gopireddy, Choungki Song, Josep Torrellas, Nam Sung Kim, Aditya Agrawal, Asit K. Mishra
2016MICROSnatch: Opportunistically reassigning power allocation between processor and memory in 3D stacks.Dimitrios Skarlatos, Renji Thomas, Aditya Agrawal, Shibin Qin, Robert C. N. Pilawa-Podgurski, Ulya R. Karpuzcu, Radu Teodorescu, Nam Sung Kim, Josep Torrellas
2014HPCAMosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules.Aditya Agrawal, Amin Ansari, Josep Torrellas
2013HPCARefrint: Intelligent refresh to minimize power in on-chip multiprocessor cache hierarchies.Aditya Agrawal, Prabhat Jain, Amin Ansari, Josep Torrellas
2013HPCARunnemede: An architecture for Ubiquitous High-Performance Computing.Nicholas P. Carter, Aditya Agrawal, Shekhar Borkar, Romain Cledat, Howard David, Dave Dunning, Joshua B. Fryman, Ivan Ganev, Roger A. Golliver, Rob C. Knauerhase, Richard Lethin, Benot Meister, Asit K. Mishra, Wilfred R. Pinfold, Justin Teller, Josep Torrellas, Nicolas Vasilache, Ganesh Venkatesh, Jianping Xu
2004GPCETowards Generation of Efficient Transformations.Attila Vizhanyo, Aditya Agrawal, Feng Shi
2003OOPSLAMetamodel based model transformation language to facilitate domain specific model driven architecture.Aditya Agrawal
2003OOPSLAMetamodel based model transformation language.Aditya Agrawal
2003OOPSLAAn end-to-end domain-driven software development framework.Aditya Agrawal, Gabor Karsai, kos Ldeczi
1995ICCCNA new ATM congestion control scheme for shared buffer switch architectures.Aditya Agrawal, Magdy A. Bayoumi, Amr Elchouemi
1993VLSIDLATCHECK: A Latchup Checker for VLSI Layouts.Aditya Agrawal, P. V. Srinivas, Gade Sreenivas, Uttiya Dasgupta