Skip to content
cs-conference-ranking
.org
By subfield
By rank
Methodology
⌕
Search 971 venues
Home
/
VLSID
/
Paper
Synchronous Test Generation Model for Asynchronous Circuits.
Savita Banerjee
,
Srimat T. Chakradhar
,
Rabindra K. Roy
Venue
National
VLSID
Year
1996
Proceedings
VLSI Design
DBLP record
conf/vlsid/BanerjeeCR96 ↗
Browse the full
VLSID paper archive
.