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A 1.8 - 6.3 GHz Quadrature Ring VCO-based Fast-settling PLL for Wireline I/O in 55nm CMOS.
Javed S. Gaggatur
Venue
National
VLSID
Year
2021
Proceedings
VLSID
DBLP record
conf/vlsid/Gaggatur21 ↗
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